[Intel-gfx] [PATCH 4/4] drm/i915/perf: add a parameter to control the size of OA buffer

[Lionel Landwerlin]

On 10/10/2018 18:01, Chris Wilson wrote:
> Quoting Lionel Landwerlin (2018-10-10 17:55:33)
>> @@ -1518,12 +1520,14 @@ static int alloc_oa_buffer(struct drm_i915_private *dev_priv)
>>                  goto err_unref;
>>   
>>          /* PreHSW required 512K alignment, HSW requires 16M */
>> -       vma = i915_gem_object_ggtt_pin(bo, NULL, 0, SZ_16M, 0);
>> +       vma = i915_gem_object_ggtt_pin(bo, NULL, 0, size, 0);
> That's not size, that's align. Presumably this doesn't change as HSW 
> is still going to require 16MiB? -Chris
Duh! Thanks a lot!

-
Lionel