[Intel-gfx] [PATCH v2] drm/i915/aml: Add new Amber Lake PCI ID

[Rodrigo Vivi]

On Wed, Sep 26, 2018 at 06:06:50PM -0700, José Roberto de Souza wrote:
> This new AML PCI ID uses the same gen graphics as Coffe Lake not a
> Kaby Lake one like the other AMLs.
> 
> So to make it more explicit renaming INTEL_AML_GT2_IDS to
> INTEL_AML_KBL_GT2_IDS and naming this id as INTEL_AML_CFL_GT2_IDS.
> 
> v2:
> - missed add new AML macro to INTEL_CFL_IDS()
> - added derivated platform initials to AML macros
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>

pushed to dinq.

> ---
>  drivers/gpu/drm/i915/i915_pci.c |  3 ++-
>  include/drm/i915_pciids.h       | 11 ++++++++---
>  2 files changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index adac75e5d5f7..d8129b04838a 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -665,7 +665,7 @@ static const struct pci_device_id pciidlist[] = {
>  	INTEL_KBL_GT2_IDS(&intel_kabylake_gt2_info),
>  	INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),
>  	INTEL_KBL_GT4_IDS(&intel_kabylake_gt3_info),
> -	INTEL_AML_GT2_IDS(&intel_kabylake_gt2_info),
> +	INTEL_AML_KBL_GT2_IDS(&intel_kabylake_gt2_info),
>  	INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
>  	INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
>  	INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
> @@ -673,6 +673,7 @@ static const struct pci_device_id pciidlist[] = {
>  	INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
>  	INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),
>  	INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
> +	INTEL_AML_CFL_GT2_IDS(&intel_coffeelake_gt2_info),
>  	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
>  	INTEL_CNL_IDS(&intel_cannonlake_info),
>  	INTEL_ICL_11_IDS(&intel_icelake_11_info),
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index fd965ffbb92e..86174f264b4a 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -365,16 +365,20 @@
>  	INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
>  
>  /* AML/KBL Y GT2 */
> -#define INTEL_AML_GT2_IDS(info) \
> +#define INTEL_AML_KBL_GT2_IDS(info) \
>  	INTEL_VGA_DEVICE(0x591C, info),  /* ULX GT2 */ \
>  	INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
>  
> +/* AML/CFL Y GT2 */
> +#define INTEL_AML_CFL_GT2_IDS(info) \
> +	INTEL_VGA_DEVICE(0x87CA, info)
> +
>  #define INTEL_KBL_IDS(info) \
>  	INTEL_KBL_GT1_IDS(info), \
>  	INTEL_KBL_GT2_IDS(info), \
>  	INTEL_KBL_GT3_IDS(info), \
>  	INTEL_KBL_GT4_IDS(info), \
> -	INTEL_AML_GT2_IDS(info)
> +	INTEL_AML_KBL_GT2_IDS(info)
>  
>  /* CFL S */
>  #define INTEL_CFL_S_GT1_IDS(info) \
> @@ -427,7 +431,8 @@
>  	INTEL_CFL_U_GT3_IDS(info), \
>  	INTEL_WHL_U_GT1_IDS(info), \
>  	INTEL_WHL_U_GT2_IDS(info), \
> -	INTEL_WHL_U_GT3_IDS(info)
> +	INTEL_WHL_U_GT3_IDS(info), \
> +	INTEL_AML_CFL_GT2_IDS(info)
>  
>  /* CNL */
>  #define INTEL_CNL_IDS(info) \
> -- 
> 2.19.0
> 
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