[Intel-gfx] [PATCH 2/4] drm/i915/icl: No need to ack intr through master control

Matthew Auld matthew.william.auld at gmail.com
Fri Oct 12 11:12:50 UTC 2018


On Tue, 2 Oct 2018 at 15:07, Mika Kuoppala
<mika.kuoppala at linux.intel.com> wrote:
>
> All other master control register bits, except the enable,
> are read only and they are level indications of the second
> level interrupt status. Only touch enable bit and rectify
> the comment.
>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
Reviewed-by: Matthew Auld <matthew.auld at intel.com>


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