[Intel-gfx] [PATCH v2 4/6] drm/i915/icl: WaAllowUMDToModifySamplerMode
Radhakrishna Sripada
radhakrishna.sripada at intel.com
Fri Oct 12 18:58:49 UTC 2018
On Thu, Oct 04, 2018 at 11:29:37AM -0700, Radhakrishna Sripada wrote:
> From: Oscar Mateo <oscar.mateo at intel.com>
>
> Required for Bindless samplers.
>
> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 ++
> drivers/gpu/drm/i915/intel_workarounds.c | 3 +++
> 2 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 4fb8e9eef312..c8a187d8db0f 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8632,6 +8632,8 @@ enum {
> #define GAMW_ECO_DEV_RW_IA_REG _MMIO(0x4080)
> #define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
>
> +#define GEN10_SAMPLER_MODE _MMIO(0xE18C)
> +
> /* IVYBRIDGE DPF */
> #define GEN7_L3CDERRST1(slice) _MMIO(0xB008 + (slice) * 0x200) /* L3CD Error Status 1 */
> #define GEN7_L3CDERRST1_ROW_MASK (0x7ff << 14)
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> index 69e247409050..65cd36cd2957 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -1011,6 +1011,9 @@ static void icl_whitelist_build(struct whitelist *w)
> {
> /* WaAllowUMDToModifyHalfSliceChicken7:icl */
> whitelist_reg(w, GEN9_HALF_SLICE_CHICKEN7);
> +
> + /* WaAllowUMDToModifySamplerMode:icl */
> + whitelist_reg(w, GEN10_SAMPLER_MODE);
User space consumer mesa: https://gitlab.freedesktop.org/mesa/mesa/blob/master/src/mesa/drivers/dri/i965/brw_state_upload.c#L72
Regards,
Radhakrishna(RK) Sripada
> }
>
> static struct whitelist *whitelist_build(struct intel_engine_cs *engine,
> --
> 2.9.3
>
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