[Intel-gfx] [PATCH 2/3] guc-send

[Chris Wilson]

---
 drivers/gpu/drm/i915/intel_guc.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 230aea69385d..20d1a6c7d20f 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -31,7 +31,7 @@ static void gen8_guc_raise_irq(struct intel_guc *guc)
 {
 	struct drm_i915_private *dev_priv = guc_to_i915(guc);
 
-	I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
+	I915_WRITE_FW(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
 }
 
 static inline i915_reg_t guc_send_reg(struct intel_guc *guc, u32 i)
@@ -404,9 +404,9 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len,
 	intel_uncore_forcewake_get(dev_priv, guc->send_regs.fw_domains);
 
 	for (i = 0; i < len; i++)
-		I915_WRITE(guc_send_reg(guc, i), action[i]);
+		I915_WRITE_FW(guc_send_reg(guc, i), action[i]);
 
-	POSTING_READ(guc_send_reg(guc, i - 1));
+	POSTING_READ_FW(guc_send_reg(guc, i - 1));
 
 	intel_guc_notify(guc);
 
@@ -419,7 +419,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len,
 					   INTEL_GUC_MSG_TYPE_MASK,
 					   INTEL_GUC_MSG_TYPE_RESPONSE <<
 					   INTEL_GUC_MSG_TYPE_SHIFT,
-					   10, 10, &status);
+					   10, 50, &status);
 	/* If GuC explicitly returned an error, convert it to -EIO */
 	if (!ret && !INTEL_GUC_MSG_IS_RESPONSE_SUCCESS(status))
 		ret = -EIO;
@@ -434,7 +434,8 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len,
 		int count = min(response_buf_size, guc->send_regs.count - 1);
 
 		for (i = 0; i < count; i++)
-			response_buf[i] = I915_READ(guc_send_reg(guc, i + 1));
+			response_buf[i] =
+			       	I915_READ_FW(guc_send_reg(guc, i + 1));
 	}
 
 	/* Use data from the GuC response as our return value */
-- 
2.19.1