[Intel-gfx] [v1 03/10] drm/i915: context submission pvmmio optimization
Zhang, Xiaolin
xiaolin.zhang at intel.com
Mon Oct 15 02:35:41 UTC 2018
On 10/11/2018 05:12 PM, Chris Wilson wrote:
> Quoting Xiaolin Zhang (2018-10-11 07:14:05)
>> It is performance optimization to reduce mmio trap numbers from 4 to
>> 1 durning ELSP porting writing (context submission).
>>
>> When context subission, to cache elsp_data[4] values in
>> the shared page, the last elsp_data[0] port writing will be trapped
>> to gvt for real context submission.
>>
>> Use PVMMIO_ELSP_SUBMIT to control this level of pvmmio optimization.
>>
>> v1: rebase
>> v0: RFC
>>
>> Signed-off-by: Xiaolin Zhang <xiaolin.zhang at intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_vgpu.c | 2 ++
>> drivers/gpu/drm/i915/intel_lrc.c | 37 ++++++++++++++++++++++++++++++++++++-
> Hint: intel_vgpu_submission.c and go wild. You do not need to emulate
> execlists at all, an async interface along the lines of guc would
> strangely enough be more akin to what you want.
> -Chris
>
can't understand your comment very well. so far, vgpu only support
execlist workload submission only, this pv optimization is only valid
for execlist submission and can't support guc.
BRs, Xiaolin
More information about the Intel-gfx
mailing list