[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/icl: dsi enabling
Patchwork
patchwork at emeril.freedesktop.org
Mon Oct 15 15:09:50 UTC 2018
== Series Details ==
Series: drm/i915/icl: dsi enabling
URL : https://patchwork.freedesktop.org/series/51011/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4981 -> Patchwork_10459 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10459 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10459, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/51011/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10459:
=== IGT changes ===
==== Possible regressions ====
igt at kms_busy@basic-flip-a:
fi-icl-u2: PASS -> DMESG-WARN
== Known issues ==
Here are the changes found in Patchwork_10459 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt at kms_flip@basic-flip-vs-dpms:
fi-skl-6700hq: PASS -> DMESG-WARN (fdo#105998)
igt at kms_pipe_crc_basic@hang-read-crc-pipe-a:
fi-ilk-650: PASS -> DMESG-WARN (fdo#106387) +1
==== Possible fixes ====
igt at gem_exec_suspend@basic-s3:
fi-icl-u: INCOMPLETE (fdo#107713) -> PASS
igt at kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS
igt at pm_rpm@module-reload:
{fi-apl-guc}: DMESG-WARN (fdo#106685) -> PASS
fi-skl-6600u: INCOMPLETE (fdo#107807) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
fdo#106387 https://bugs.freedesktop.org/show_bug.cgi?id=106387
fdo#106685 https://bugs.freedesktop.org/show_bug.cgi?id=106685
fdo#107713 https://bugs.freedesktop.org/show_bug.cgi?id=107713
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807
== Participating hosts (54 -> 48) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-ctg-p8600
== Build changes ==
* Linux: CI_DRM_4981 -> Patchwork_10459
CI_DRM_4981: 79887268bfe4128788d7cfcf38b62308346fd7f1 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4677: 68ff28a022dbaa26a20c8a3c0212011a006614b0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10459: 40cd071d495aebb20871cb992c8b7163d6bd89f8 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
40cd071d495a drm/i915/icl: Turn ON panel backlight
f24121c2b8aa drm/i915/icl: Ensure all cmd/data disptached to panel
2ded53515fac drm/i915/icl: Wait for header/payload credits release
b4f147d6e59a drm/i915/icl: Power on DSI panel
8fbeffd78efd drm/i915/icl: Set max return packet size for DSI panel
b4e25fc83b04 drm/i915/icl: Define DSI panel programming registers
45434712c8ed drm/i915/icl: Enable DSI transcoders
2798285cb709 drm/i915/icl: Define TRANS_CONF register for DSI
f40776f438c5 drm/i915/icl: Configure DSI transcoder timings
16b3a933fd57 drm/i915/icl: Define DSI transcoder timing registers
c4b1dbebffe2 drm/i915/icl: Program TRANS_DDI_FUNC_CTL registers
fa60d3c6232b drm/i915/icl: Define TRANS_DDI_FUNC_CTL DSI registers
8fedd977c309 drm/i915/icl: Configure DSI transcoders
5dcfc9bcf556 drm/i915/icl: Define TRANS_DSI_FUNC_CONF register
f214bf74072b drm/i915/icl: Add macros for MMIO of DSI transcoder registers
0e2b629b050f drm/i915/icl: Get DSI transcoder for a given port
51bb6f5afbd6 drm/i915/icl: Program TA_TIMING_PARAM registers
1766764bfdc9 drm/i915/icl: Program DSI clock and data lane timing params
f5d8752673e3 drm/i915/icl: Make common DSI functions available
f747b1606322 drm/i915/dsi: abstract intel_dsi_tlpx_ns()
b14852354e52 drm/i915/dsi: abstract dphy parameter init
1a879a6d5120 drm/i915/dsi: refactor bitrate calculations in intel_dsi_vbt_init()
b12abf6e31c4 drm/i915: make encoder enable and disable hooks optional
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10459/issues.html
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