[Intel-gfx] [PATCH v3 1/4] drm: Add Y210, Y212, Y216 format definitions and fourcc

Alexandru-Cosmin Gheorghe Alexandru-Cosmin.Gheorghe at arm.com
Tue Oct 16 09:35:21 UTC 2018


Hi Swati,

On Mon, Oct 15, 2018 at 01:39:54PM +0530, SwatiSharma at outlook.ms-acdc.office.com wrote:
> From: Vidya Srinivas <vidya.srinivas at intel.com>
> 
> The following pixel formats are packed format that follows 4:2:2
> chroma sampling. For memory represenation each component is
> allocated 16 bits each. Thus each pixel occupies 32bit.
> 
> Y210: Valid data occupies MSB 10 bits.
>       LSB 6 bits are filled with zeroes.
> Y212: Valid data occupies MSB 12 bits.
>       LSB 4 bits are filled with zeroes.
> Y216: Valid data occupies 16 bits,
>       doesn't require any padding bits.
> 
> First 16 bits stores the Y value and the next 16 bits stores one
> of the chroma samples alternatively. The first luma sample will
> be accompanied by first U sample and second luma sample is
> accompanied by the first V sample.
> 
> v2: is_yuv setted to true (mahesh)
>     different order of yuv samples (mahesh): still update from
>     hardware team pending
>     change in comment (alexandru)
> 
> v3: change in patch comment (juha)
>     change in fourcc_code comment (juha)
>     different order of yuv samples needs to be defined for Y210/
>     Y212/Y216 (update from h/w folks): not including in this patch,
>     will do in other patch series (if reqd)
> 
> Signed-off-by: Swati Sharma <swati2.sharma at intel.com>
> Signed-off-by: Vidya Srinivas <vidya.srinivas at intel.com>
> ---
>  drivers/gpu/drm/drm_fourcc.c  | 3 +++
>  include/uapi/drm/drm_fourcc.h | 8 ++++++++
>  2 files changed, 11 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> index 90a1c84..667527b 100644
> --- a/drivers/gpu/drm/drm_fourcc.c
> +++ b/drivers/gpu/drm/drm_fourcc.c
> @@ -225,6 +225,9 @@ const struct drm_format_info *__drm_format_info(u32 format)
>  		{ .format = DRM_FORMAT_UYVY,		.depth = 0,  .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>  		{ .format = DRM_FORMAT_VYUY,		.depth = 0,  .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>  		{ .format = DRM_FORMAT_AYUV,		.depth = 0,  .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> +		{ .format = DRM_FORMAT_Y210,            .depth = 0,  .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> +		{ .format = DRM_FORMAT_Y212,            .depth = 0,  .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> +		{ .format = DRM_FORMAT_Y216,            .depth = 0,  .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },

Shouldn't this be .cpp {4, 0, 0}? otherwise framebuffer_check will
require a minimum pitch bigger than actually required.

I think you need to apply the same convention as with other 422 packed
formats, see DRM_FORMAT_YUYV & DRM_FORMAT_UYVY.

>  	};
>  
>  	unsigned int i;
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 139632b..af1c900 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -153,6 +153,14 @@
>  #define DRM_FORMAT_AYUV		fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
>  
>  /*
> + * packed Y2xx indicate for each component, xx valid data occupy msb
> + * 16-xx padding occupy lsb
> + */
> +#define DRM_FORMAT_Y210         fourcc_code('Y', '2', '1', '0') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 10:6:10:6:10:6:10:6 little endian */
> +#define DRM_FORMAT_Y212         fourcc_code('Y', '2', '1', '2') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 12:4:12:4:12:4:12:4 little endian */
> +#define DRM_FORMAT_Y216         fourcc_code('Y', '2', '1', '6') /* [63:0] Y0:Cb0:Y1:Cr1 16:16:16:16 little endian */
> +
> +/*
>   * 2 plane RGB + A
>   * index 0 = RGB plane, same format as the corresponding non _A8 format has
>   * index 1 = A plane, [7:0] A
> -- 
> 1.9.1

-- 
Cheers,
Alex G


More information about the Intel-gfx mailing list