[Intel-gfx] [PATCH 1/2] drm/i915/guc: Limit number of scratch registers used for H2G
Daniele Ceraolo Spurio
daniele.ceraolospurio at intel.com
Tue Oct 16 16:26:54 UTC 2018
On 10/16/2018 4:44 AM, Chris Wilson wrote:
> Quoting Michal Wajdeczko (2018-10-16 10:42:06)
>> We wrongly assumed that GuC is only using last scratch register
>> for G2H messages, but in fact it is also using register [14] to
>> report sleep state status. Remove that register from our H2G
>> send registers pool.
> I'll leave it up to you and Daniele to work out if it is being
> exclusively used for this purpose or if it is just part of the response
> for the suspend/resume message.
> -Chris
AFAICS in the GuC FW, the same register is reused for other purposes in
other actions (that we don't use/need), but always as a GuC to host
response.
No message from host to guc uses more than 8 registers and the GuC FW
itself uses an 8-element array to store the H2G message, so we could
reduce our send array to just 8 regs. The GEM_BUG_ON() in guc_send_reg()
would avoid troubles if a command requiring more than 8 register was
added later, but I'd say that's extremely unlikely since the old SKL FW
is not getting any major updates and the new one uses CT buffers so we
don't care about the registers.
Daniele
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