[Intel-gfx] [PATCH] drm/i915/icl: Store available engine masks in INTEL_INFO

[Daniele Ceraolo Spurio]

On 18/10/18 03:41, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> 
> Upcoming GuC code will need to read the fused off engine masks as well,
> and will also want to have them as enabled instead of disabled masks.
> 
> To consolidate the read-out place we can store them in this fashion inside
> INTEL_INFO so they can be easily referenced in the future.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>

The GuC patch that re-reads the fuse register is here: 
https://patchwork.freedesktop.org/patch/246427/

Consolidations wins:
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>

Daniele

> ---
>   drivers/gpu/drm/i915/intel_device_info.c | 33 +++++++++++-------------
>   drivers/gpu/drm/i915/intel_device_info.h |  4 +++
>   2 files changed, 19 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 03df4e33763d..4ed86025e3c9 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -876,40 +876,37 @@ void intel_driver_caps_print(const struct intel_driver_caps *caps,
>   void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
>   {
>   	struct intel_device_info *info = mkwrite_device_info(dev_priv);
> -	u8 vdbox_disable, vebox_disable;
>   	u32 media_fuse;
> -	int i;
> +	unsigned int i;
>   
>   	if (INTEL_GEN(dev_priv) < 11)
>   		return;
>   
> -	media_fuse = I915_READ(GEN11_GT_VEBOX_VDBOX_DISABLE);
> +	media_fuse = ~I915_READ(GEN11_GT_VEBOX_VDBOX_DISABLE);
>   
> -	vdbox_disable = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK;
> -	vebox_disable = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >>
> -			GEN11_GT_VEBOX_DISABLE_SHIFT;
> +	info->vdbox_enable = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK;
> +	info->vebox_enable = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >>
> +			     GEN11_GT_VEBOX_DISABLE_SHIFT;
>   
> -	DRM_DEBUG_DRIVER("vdbox disable: %04x\n", vdbox_disable);
> +	DRM_DEBUG_DRIVER("vdbox enable: %04x\n", info->vdbox_enable);
>   	for (i = 0; i < I915_MAX_VCS; i++) {
>   		if (!HAS_ENGINE(dev_priv, _VCS(i)))
>   			continue;
>   
> -		if (!(BIT(i) & vdbox_disable))
> -			continue;
> -
> -		info->ring_mask &= ~ENGINE_MASK(_VCS(i));
> -		DRM_DEBUG_DRIVER("vcs%u fused off\n", i);
> +		if (!(BIT(i) & info->vdbox_enable)) {
> +			info->ring_mask &= ~ENGINE_MASK(_VCS(i));
> +			DRM_DEBUG_DRIVER("vcs%u fused off\n", i);
> +		}
>   	}
>   
> -	DRM_DEBUG_DRIVER("vebox disable: %04x\n", vebox_disable);
> +	DRM_DEBUG_DRIVER("vebox enable: %04x\n", info->vebox_enable);
>   	for (i = 0; i < I915_MAX_VECS; i++) {
>   		if (!HAS_ENGINE(dev_priv, _VECS(i)))
>   			continue;
>   
> -		if (!(BIT(i) & vebox_disable))
> -			continue;
> -
> -		info->ring_mask &= ~ENGINE_MASK(_VECS(i));
> -		DRM_DEBUG_DRIVER("vecs%u fused off\n", i);
> +		if (!(BIT(i) & info->vebox_enable)) {
> +			info->ring_mask &= ~ENGINE_MASK(_VECS(i));
> +			DRM_DEBUG_DRIVER("vecs%u fused off\n", i);
> +		}
>   	}
>   }
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index af7002640cdf..b4c2c4eae78b 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -185,6 +185,10 @@ struct intel_device_info {
>   
>   	u32 cs_timestamp_frequency_khz;
>   
> +	/* Enabled (not fused off) media engine bitmasks. */
> +	u8 vdbox_enable;
> +	u8 vebox_enable;
> +
>   	struct color_luts {
>   		u16 degamma_lut_size;
>   		u16 gamma_lut_size;
>