[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915 pvmmio to improve GVTg performance

[Patchwork]

== Series Details ==

Series: i915 pvmmio to improve GVTg performance
URL   : https://patchwork.freedesktop.org/series/51235/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
d9bbdfcc803c drm/i915: introduced pv capability for vgpu
-:66: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#66: FILE: drivers/gpu/drm/i915/i915_drv.h:3888:
+#define PVMMIO_LEVEL_ENABLE(dev_priv, level)	\
+	(intel_vgpu_active(dev_priv) && intel_vgpu_has_pvmmio(dev_priv) \
+			&& (dev_priv->vgpu.pv_caps & level))

-:66: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'level' may be better as '(level)' to avoid precedence issues
#66: FILE: drivers/gpu/drm/i915/i915_drv.h:3888:
+#define PVMMIO_LEVEL_ENABLE(dev_priv, level)	\
+	(intel_vgpu_active(dev_priv) && intel_vgpu_has_pvmmio(dev_priv) \
+			&& (dev_priv->vgpu.pv_caps & level))

-:68: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the previous line
#68: FILE: drivers/gpu/drm/i915/i915_drv.h:3890:
+	(intel_vgpu_active(dev_priv) && intel_vgpu_has_pvmmio(dev_priv) \
+			&& (dev_priv->vgpu.pv_caps & level))

-:135: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#135: FILE: drivers/gpu/drm/i915/i915_vgpu.c:91:
+	__raw_i915_write32(dev_priv, vgtif_reg(enable_pvmmio),
+			dev_priv->vgpu.pv_caps);

-:137: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#137: FILE: drivers/gpu/drm/i915/i915_vgpu.c:93:
+	dev_priv->vgpu.pv_caps = __raw_i915_read32(dev_priv,
+			vgtif_reg(enable_pvmmio));

-:140: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#140: FILE: drivers/gpu/drm/i915/i915_vgpu.c:96:
+	DRM_INFO("Virtual GPU for Intel GVT-g detected with pvmmio 0x%x\n",
+			dev_priv->vgpu.pv_caps);

total: 0 errors, 0 warnings, 6 checks, 95 lines checked
299416ad92bb drm/i915: get ready of memory for pvmmio
-:52: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#52: FILE: drivers/gpu/drm/i915/i915_drv.h:1348:
+	spinlock_t shared_page_lock;

-:127: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#127: FILE: drivers/gpu/drm/i915/i915_vgpu.c:104:
+		__raw_i915_write32(dev_priv, vgtif_reg(shared_page_gpa.lo),
+				lower_32_bits(gpa));

-:129: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#129: FILE: drivers/gpu/drm/i915/i915_vgpu.c:106:
+		__raw_i915_write32(dev_priv, vgtif_reg(shared_page_gpa.hi),
+				upper_32_bits(gpa));

-:131: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#131: FILE: drivers/gpu/drm/i915/i915_vgpu.c:108:
+		if (gpa != __raw_i915_read64(dev_priv,
+				vgtif_reg(shared_page_gpa))) {

total: 0 errors, 0 warnings, 4 checks, 91 lines checked
894384390637 drm/i915: context submission pvmmio optimization
3b2302382036 drm/i915: master irq pvmmio optimization
ec509230b0ea drm/i915: ppgtt update pvmmio optimization
-:38: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#38: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:960:
+static void gen8_ppgtt_clear_4lvl_pv(struct i915_address_space *vm,
+				  u64 start, u64 length)

-:64: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#64: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1220:
+static void gen8_ppgtt_insert_4lvl_pv(struct i915_address_space *vm,
+				   struct i915_vma *vma,

-:90: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#90: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1508:
+static int gen8_ppgtt_alloc_4lvl_pv(struct i915_address_space *vm,
+				 u64 start, u64 length)

total: 0 errors, 0 warnings, 3 checks, 109 lines checked