[Intel-gfx] [PULL] gvt-next-fixes for 4.20
Joonas Lahtinen
joonas.lahtinen at linux.intel.com
Thu Oct 25 13:07:14 UTC 2018
Quoting Zhenyu Wang (2018-10-23 06:46:59)
>
> Hi,
>
> Here's gvt-next-fixes for 4.20 with three changes. Mostly
> to fix possible arbitrary update on guest GGTT entry and
> with proper invalidate of old entry. Another one for one
> chicken reg mask fix.
>
> thanks
Hi,
DIM seems to be (rightfully) complaining about one commit:
3e740f0ec37acecaa364c19d2d2826df83c8bf20 is lacking committer of sign-off
Probably better if you re-submit the PR for -fixes (rebased for
v4.20-rc1).
Regards, Joonas
> --
> The following changes since commit 835fe6d75d14c1513910ed7f5665127fee12acc8:
>
> firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. (2018-10-18 10:36:10 +0300)
>
> are available in the Git repository at:
>
> https://github.com/intel/gvt-linux.git tags/gvt-next-fixes-2018-10-23
>
> for you to fetch changes up to 3e740f0ec37acecaa364c19d2d2826df83c8bf20:
>
> drm/i915/gvt: correct mask setting for CSFE_CHICKEN1 (2018-10-19 11:32:41 +0800)
>
> ----------------------------------------------------------------
> gvt-next-fixes-2018-10-23
>
> - Fix invalidate of old ggtt entry (Hang)
> - Fix partial ggtt entry update in any order (Hang)
> - Fix one mask setting for chicken reg (Xinyun)
>
> ----------------------------------------------------------------
> Hang Yuan (2):
> drm/i915/gvt: invalidate old ggtt page when update ggtt entry
> drm/i915/gvt: support inconsecutive partial gtt entry write
>
> Xinyun Liu (1):
> drm/i915/gvt: correct mask setting for CSFE_CHICKEN1
>
> drivers/gpu/drm/i915/gvt/gtt.c | 115 ++++++++++++++++----------------
> drivers/gpu/drm/i915/gvt/gtt.h | 9 ++-
> drivers/gpu/drm/i915/gvt/mmio_context.c | 2 +-
> 3 files changed, 66 insertions(+), 60 deletions(-)
>
>
> --
> Open Source Technology Center, Intel ltd.
>
> $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
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