[Intel-gfx] [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE
Chris Wilson
chris at chris-wilson.co.uk
Fri Oct 26 14:58:11 UTC 2018
For example, we may want to split a 2MiB large page into multiple 64KiB
PTEs. To do so, we want to allow a vma that only has the 2MiB flag set
to utilise the 64KiB as required, i.e. we want to include all larger
pages as well.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld at intel.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
drivers/gpu/drm/i915/selftests/huge_pages.c | 17 +++++++++++------
2 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 19b2d991b5d8..9e1756216ada 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1074,7 +1074,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
gen8_pte_t *vaddr;
u16 index, max;
- if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_2M &&
+ if (vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_2M &&
IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_2M) &&
rem >= I915_GTT_PAGE_SIZE_2M && !idx.pte) {
index = idx.pde;
@@ -1092,7 +1092,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
page_size = I915_GTT_PAGE_SIZE;
if (!index &&
- vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K &&
+ vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_64K &&
IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_64K) &&
(IS_ALIGNED(rem, I915_GTT_PAGE_SIZE_64K) ||
rem >= (max - index) * I915_GTT_PAGE_SIZE))
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
index 256001b00e32..2d66f380ad9a 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -508,6 +508,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
goto out_unpin;
}
+ GEM_BUG_ON(vma->page_sizes.gtt);
err = i915_vma_pin(vma, 0, 0, flags);
if (err) {
i915_vma_close(vma);
@@ -517,8 +518,9 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
err = igt_check_page_sizes(vma);
- if (vma->page_sizes.gtt != page_size) {
- pr_err("page_sizes.gtt=%u, expected %u\n",
+ if (!(vma->page_sizes.gtt & -page_size)) {
+ pr_err("%s:%d page_sizes.gtt=%u, expected %u\n",
+ __func__, __LINE__,
vma->page_sizes.gtt, page_size);
err = -EINVAL;
}
@@ -542,6 +544,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
goto out_unpin;
}
+ GEM_BUG_ON(vma->page_sizes.gtt);
err = i915_vma_pin(vma, 0, 0, flags | offset);
if (err) {
i915_vma_close(vma);
@@ -550,8 +553,9 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
err = igt_check_page_sizes(vma);
- if (vma->page_sizes.gtt != I915_GTT_PAGE_SIZE_4K) {
- pr_err("page_sizes.gtt=%u, expected %llu\n",
+ if (!(vma->page_sizes.gtt & -I915_GTT_PAGE_SIZE_4K)) {
+ pr_err("%s:%d page_sizes.gtt=%u, expected %llu\n",
+ __func__, __LINE__,
vma->page_sizes.gtt, I915_GTT_PAGE_SIZE_4K);
err = -EINVAL;
}
@@ -1471,7 +1475,7 @@ static int igt_ppgtt_pin_update(void *arg)
if (err)
goto out_unpin;
- if (vma->page_sizes.gtt != page_size) {
+ if (!(vma->page_sizes.gtt & -page_size)) {
dma_addr_t addr = i915_gem_object_get_dma_address(obj, 0);
/*
@@ -1481,7 +1485,8 @@ static int igt_ppgtt_pin_update(void *arg)
* address.
*/
if (IS_ALIGNED(addr, page_size)) {
- pr_err("page_sizes.gtt=%u, expected=%u\n",
+ pr_err("%s:%d page_sizes.gtt=%u, expected=%u\n",
+ __func__, __LINE__,
vma->page_sizes.gtt, page_size);
err = -EINVAL;
} else {
--
2.19.1
More information about the Intel-gfx
mailing list