[Intel-gfx] [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE

Chris Wilson chris at chris-wilson.co.uk
Fri Oct 26 19:48:54 UTC 2018


Quoting Matthew Auld (2018-10-26 20:27:46)
> On Fri, 26 Oct 2018 at 16:16, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> >
> > For example, we may want to split a 2MiB large page into multiple 64KiB
> > PTEs. To do so, we want to allow a vma that only has the 2MiB flag set
> > to utilise the 64KiB as required, i.e. we want to include all larger
> > pages as well.
> 
> I thought if we have vma that only has the 2M flag, that can only mean
> that 64K is not supported by the platform?

        obj->mm.page_sizes.sg = 0;
        for_each_set_bit(i, &supported, ilog2(I915_GTT_MAX_PAGE_SIZE) + 1) {
                if (obj->mm.page_sizes.phys & ~0u << i)
                        obj->mm.page_sizes.sg |= BIT(i);
        }

.sg should indeed be set for all supported bits upto the actual page size.

> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Matthew Auld <matthew.auld at intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_gem_gtt.c         |  4 ++--
> >  drivers/gpu/drm/i915/selftests/huge_pages.c | 17 +++++++++++------
> >  2 files changed, 13 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index 19b2d991b5d8..9e1756216ada 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -1074,7 +1074,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
> >                 gen8_pte_t *vaddr;
> >                 u16 index, max;
> >
> > -               if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_2M &&
> > +               if (vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_2M &&
> >                     IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_2M) &&
> >                     rem >= I915_GTT_PAGE_SIZE_2M && !idx.pte) {
> >                         index = idx.pde;
> > @@ -1092,7 +1092,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
> >                         page_size = I915_GTT_PAGE_SIZE;
> >
> >                         if (!index &&
> > -                           vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K &&
> > +                           vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_64K &&
> 
> Yeah, so here what if the platform doesn't support 64K pages, but does
> support say 2M, and the object is 2M + 64K or perhaps it's 2M but
> somehow only aligned to 64K? I think we exercise something like that
> for the mock device, or at least I hope we do.

I'm just not having fun with scratch atm.
-Chris


More information about the Intel-gfx mailing list