[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/7] drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/7] drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming
URL   : https://patchwork.freedesktop.org/series/51711/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_5052 -> Patchwork_10637 =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_10637 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10637, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/51711/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_10637:

  === IGT changes ===

    ==== Possible regressions ====

    igt at drv_selftest@live_contexts:
      fi-bsw-n3050:       PASS -> DMESG-FAIL

    
== Known issues ==

  Here are the changes found in Patchwork_10637 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt at kms_pipe_crc_basic@suspend-read-crc-pipe-a:
      fi-byt-clapper:     PASS -> FAIL (fdo#107362, fdo#103191)
      fi-icl-u:           NOTRUN -> INCOMPLETE (fdo#107713)

    igt at pm_rpm@basic-pci-d3-state:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#106097)

    
    ==== Possible fixes ====

    igt at drv_module_reload@basic-reload:
      fi-blb-e6850:       INCOMPLETE (fdo#107718) -> PASS

    igt at gem_exec_suspend@basic-s3:
      fi-icl-u:           INCOMPLETE (fdo#107713) -> PASS

    igt at kms_flip@basic-flip-vs-dpms:
      fi-skl-6700hq:      DMESG-WARN (fdo#105998) -> PASS

    igt at kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence:
      fi-byt-clapper:     FAIL (fdo#107362, fdo#103191) -> PASS

    igt at kms_pipe_crc_basic@read-crc-pipe-b:
      fi-byt-clapper:     FAIL (fdo#107362) -> PASS

    
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
  fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#107713 https://bugs.freedesktop.org/show_bug.cgi?id=107713
  fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718


== Participating hosts (49 -> 44) ==

  Missing    (5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 


== Build changes ==

    * Linux: CI_DRM_5052 -> Patchwork_10637

  CI_DRM_5052: 24b6ea5d5f299c5e9e6b4d92068651f7f1555bd0 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4699: 1270ec553741ac20c45178d2b26f9a9562ea565f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10637: d7bcf254d5781c291e4db7a7b0269241943c07c8 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

d7bcf254d578 drm/dp: Define payload size for DP SDP PPS packet
4760c751a865 drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported
03afa383a0c4 drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC
f33cb1e31640 drm/dp: DRM DP helper/macros to get DP sink DSC parameters
8af94d076e1c drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init
a96d367cf933 drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT
40a5992273a1 drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10637/issues.html