[Intel-gfx] [PATCH 3/6] drm/i915/icl: Set TC type to unknown when a sudden disconnection happen

[Ville Syrjälä]

On Wed, Oct 10, 2018 at 02:35:05PM -0700, José Roberto de Souza wrote:
> Otherwise it would be in a inconsistent state as port is disconnected
> but with a valid tc type.
> 
> Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index d3f31103b8ec..d3af6aa1959a 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4863,6 +4863,9 @@ static void icl_update_tc_port_type(struct drm_i915_private *dev_priv,
>  			      type_str);
>  }
>  
> +static void icl_tc_phy_disconnect(struct drm_i915_private *dev_priv,
> +				  struct intel_digital_port *dig_port);
> +
>  /*
>   * This function implements the first part of the Connect Flow described by our
>   * specification, Gen11 TypeC Programming chapter. The rest of the flow (reading
> @@ -4917,9 +4920,7 @@ static bool icl_tc_phy_connect(struct drm_i915_private *dev_priv,
>  	if (dig_port->tc_type == TC_PORT_TYPEC &&
>  	    !(I915_READ(PORT_TX_DFLEXDPSP) & TC_LIVE_STATE_TC(tc_port))) {
>  		DRM_DEBUG_KMS("TC PHY %d sudden disconnect.\n", tc_port);
> -		val = I915_READ(PORT_TX_DFLEXDPCSSS);
> -		val &= ~DP_PHY_MODE_STATUS_NOT_SAFE(tc_port);
> -		I915_WRITE(PORT_TX_DFLEXDPCSSS, val);
> +		icl_tc_phy_disconnect(dev_priv, dig_port);
>  		return false;
>  	}

Patches 1-3
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

But icl_tc_port_connected() still looks somewhat busted. If the
port changes from legacy|typec to tbt we won't configure the
safe mode knob correctly.

I think we want something like this:

+ if (!is_legacy && !is_typec)
+ 	icl_tc_phy_disconnect(dev_priv, intel_dig_port);
+ 
  if (!is_legacy && !is_typec && !is_tbt) {
- 	icl_tc_phy_disconnect(dev_priv, intel_dig_port);
  	return false;
  }

>  
> -- 
> 2.19.1
> 
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-- 
Ville Syrjälä
Intel