[Intel-gfx] [PATCH v8 03/38] drm/i915/icl: Set max return packet size for DSI panel

[Jani Nikula]

On Wed, 31 Oct 2018, Madhav Chauhan <madhav.chauhan at intel.com> wrote:
> On 10/30/2018 5:26 PM, Jani Nikula wrote:
>> From: Madhav Chauhan <madhav.chauhan at intel.com>
>>
>> This patch programs maximum size of the payload transmitted
>> from peripheral back to the host processor using short packet
>> as a part of panel programming.
>>
>> v2: Rebase
>>
>> v3 by Jani:
>>   - Add FIXME note.
>
> Looks OK to me.

Thanks, pushed patches 1-3 to dinq.

BR,
Jani.

>
> Regards,
> Madhav
>
>>
>> Signed-off-by: Madhav Chauhan <madhav.chauhan at intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
>> ---
>>   drivers/gpu/drm/i915/icl_dsi.c | 33 +++++++++++++++++++++++++++++++++
>>   1 file changed, 33 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
>> index 216a1753d246..9c424adc8b75 100644
>> --- a/drivers/gpu/drm/i915/icl_dsi.c
>> +++ b/drivers/gpu/drm/i915/icl_dsi.c
>> @@ -25,6 +25,7 @@
>>    *   Jani Nikula <jani.nikula at intel.com>
>>    */
>>   
>> +#include <drm/drm_mipi_dsi.h>
>>   #include "intel_dsi.h"
>>   
>>   static enum transcoder dsi_port_to_transcoder(enum port port)
>> @@ -636,6 +637,35 @@ gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder,
>>   	gen11_dsi_configure_transcoder(encoder, pipe_config);
>>   }
>>   
>> +static void gen11_dsi_powerup_panel(struct intel_encoder *encoder)
>> +{
>> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> +	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
>> +	struct mipi_dsi_device *dsi;
>> +	enum port port;
>> +	enum transcoder dsi_trans;
>> +	u32 tmp;
>> +	int ret;
>> +
>> +	/* set maximum return packet size */
>> +	for_each_dsi_port(port, intel_dsi->ports) {
>> +		dsi_trans = dsi_port_to_transcoder(port);
>> +
>> +		/*
>> +		 * FIXME: This uses the number of DW's currently in the payload
>> +		 * receive queue. This is probably not what we want here.
>> +		 */
>> +		tmp = I915_READ(DSI_CMD_RXCTL(dsi_trans));
>> +		tmp &= NUMBER_RX_PLOAD_DW_MASK;
>> +		/* multiply "Number Rx Payload DW" by 4 to get max value */
>> +		tmp = tmp * 4;
>> +		dsi = intel_dsi->dsi_hosts[port]->device;
>> +		ret = mipi_dsi_set_maximum_return_packet_size(dsi, tmp);
>> +		if (ret < 0)
>> +			DRM_ERROR("error setting max return pkt size%d\n", tmp);
>> +	}
>> +}
>> +
>>   static void __attribute__((unused))
>>   gen11_dsi_pre_enable(struct intel_encoder *encoder,
>>   		     const struct intel_crtc_state *pipe_config,
>> @@ -650,6 +680,9 @@ gen11_dsi_pre_enable(struct intel_encoder *encoder,
>>   	/* step4: enable DSI port and DPHY */
>>   	gen11_dsi_enable_port_and_phy(encoder, pipe_config);
>>   
>> +	/* step5: program and powerup panel */
>> +	gen11_dsi_powerup_panel(encoder);
>> +
>>   	/* step6c: configure transcoder timings */
>>   	gen11_dsi_set_transcoder_timings(encoder, pipe_config);
>>   
>

-- 
Jani Nikula, Intel Open Source Graphics Center