[Intel-gfx] [PATCH v2 1/2] drm/i915/icl: Fix the macros for DFLEXDPMLE register bits

[Manasi Navare]

Pushed to dinq,thanks for the patch and reviews.

Manasi

On Tue, Oct 23, 2018 at 12:12:47PM -0700, Manasi Navare wrote:
> This patch fixes the macros used for defining the DFLEXDPMLE
> register bit fields. This accounts for changes in the spec.
> 
> Fixes: a2bc69a1a9d6 ("drm/i915/icl: Add register definition for DFLEXDPMLE")
> Cc: Animesh Manna <animesh.manna at intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
> Cc: Jose Roberto de Souza <jose.souza at intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare at intel.com>
> Reviewed-by: José Roberto de Souza <jose.souza at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 8bd61f946714..9da489b176c9 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2057,8 +2057,12 @@ enum i915_power_well_id {
>  
>  /* ICL PHY DFLEX registers */
>  #define PORT_TX_DFLEXDPMLE1		_MMIO(0x1638C0)
> -#define   DFLEXDPMLE1_DPMLETC_MASK(n)	(0xf << (4 * (n)))
> -#define   DFLEXDPMLE1_DPMLETC(n, x)	((x) << (4 * (n)))
> +#define   DFLEXDPMLE1_DPMLETC_MASK(tc_port)	(0xf << (4 * (tc_port)))
> +#define   DFLEXDPMLE1_DPMLETC_ML0(tc_port)	(1 << (4 * (tc_port)))
> +#define   DFLEXDPMLE1_DPMLETC_ML1_0(tc_port)	(3 << (4 * (tc_port)))
> +#define   DFLEXDPMLE1_DPMLETC_ML3(tc_port)	(8 << (4 * (tc_port)))
> +#define   DFLEXDPMLE1_DPMLETC_ML3_2(tc_port)	(12 << (4 * (tc_port)))
> +#define   DFLEXDPMLE1_DPMLETC_ML3_0(tc_port)	(15 << (4 * (tc_port)))
>  
>  /* BXT PHY Ref registers */
>  #define _PORT_REF_DW3_A			0x16218C
> -- 
> 2.18.0
>