[Intel-gfx] [PATCH xf86-video-intel] sna/io: Align the linear source buffer to cache line for 2d blt

[Chris Wilson]

Quoting Guang Bai (2018-09-04 06:37:31)
> On SKL+ the linear source buffer has to start from cache line boundary
> to meet the 2d engine source copy requirements.

First update the requirement function.

Are you sure about this? As this would be quite a reduction in
functionality. There's the bug on bdw+ for not starting on a
cacheline...
-Chris