[Intel-gfx] [PATCH] drm/i915/ringbuffer: Move double invalidate to after pd flush

Chris Wilson chris at chris-wilson.co.uk
Tue Sep 4 13:27:24 UTC 2018


Quoting Mika Kuoppala (2018-09-04 14:22:17)
> Chris Wilson <chris at chris-wilson.co.uk> writes:
> 
> > Continuing the fun of trying to find exactly the delay that is
> > sufficient to ensure that the page directory is fully loaded between
> > context switches, move the extra flush added in commit 70b73f9ac113
> > ("drm/i915/ringbuffer: Delay after invalidating gen6+ xcs") to just
> > after we flush the pd. Entirely based on the empirical data of running
> > failing tests in a loop until we survive a day (before the mtbf is 10-30
> > minutes).
> >
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107769
> > References: 70b73f9ac113 ("drm/i915/ringbuffer: Delay after invalidating gen6+ xcs")
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > ---
> >  drivers/gpu/drm/i915/intel_ringbuffer.c | 40 ++++++++++++++-----------
> >  1 file changed, 22 insertions(+), 18 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index 86604dd1c5a5..472939f5c18f 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -1707,9 +1707,29 @@ static int switch_context(struct i915_request *rq)
> >       }
> >  
> >       if (ppgtt) {
> > +             ret = engine->emit_flush(rq, EMIT_INVALIDATE);
> > +             if (ret)
> > +                     goto err_mm;
> > +
> >               ret = flush_pd_dir(rq);
> >               if (ret)
> >                       goto err_mm;
> > +
> > +             /*
> > +              * Not only do we need a full barrier (post-sync write) after
> > +              * invalidating the TLBs, but we need to wait a little bit
> > +              * longer. Whether this is merely delaying us, or the
> > +              * subsequent flush is a key part of serialising with the
> > +              * post-sync op, this extra pass appears vital before a
> > +              * mm switch!
> > +              */
> > +             ret = engine->emit_flush(rq, EMIT_INVALIDATE);
> > +             if (ret)
> > +                     goto err_mm;
> > +
> > +             ret = engine->emit_flush(rq, EMIT_FLUSH);
> > +             if (ret)
> > +                     goto err_mm;
> 
> Someone said that proof is in the pudding. Just could
> be more fun if someone would show us the recipe.

Hah, in the Coca-Cola Company two people know the secret, we are much
more secure than that!
-Chris


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