[Intel-gfx] [PATH i-g-t 0/2] Per context dynamic (sub)slice power-gating

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Some tests for the corresponding i915 series.

I dropped the benchmark for now but plan to bring it back later.

Lionel Landwerlin (2):
  headers: bump
  tests: add slice power programming test

 include/drm-uapi/amdgpu_drm.h  |   23 +
 include/drm-uapi/drm.h         |    7 +
 include/drm-uapi/drm_mode.h    |   22 +-
 include/drm-uapi/etnaviv_drm.h |    6 +
 include/drm-uapi/exynos_drm.h  |  240 ++++++++
 include/drm-uapi/i915_drm.h    |   43 ++
 include/drm-uapi/msm_drm.h     |    2 +
 include/drm-uapi/tegra_drm.h   |  492 ++++++++++++++-
 include/drm-uapi/vc4_drm.h     |   13 +-
 include/drm-uapi/virtgpu_drm.h |    1 +
 tests/Makefile.am              |    1 +
 tests/Makefile.sources         |    1 +
 tests/gem_ctx_param.c          |    4 +-
 tests/gem_ctx_sseu.c           | 1040 ++++++++++++++++++++++++++++++++
 tests/meson.build              |    7 +
 15 files changed, 1885 insertions(+), 17 deletions(-)
 create mode 100644 tests/gem_ctx_sseu.c

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2.17.1