[Intel-gfx] [PATCH v2 2/2] drm/i915/icl: Update result lines in correspondence with result blocks

[B S, Karthik]

On 9/6/2018 5:12 AM, Rodrigo Vivi wrote:
> The subject here is marked as icl, but the code seems to all platforms
> what am I missing?
Sorry, my mistake. Will update it accordingly.
> But also I didn't check spec yet on this particular case

The spec only mentions that the result lines should be greater than the 
level 0 result lines.

But this change is in line with the code comment for result blocks, to 
make sure that the result lines calculated is in correspondence with the 
result blocks.

>
> On Wed, Sep 05, 2018 at 02:32:39PM +0530, Karthik B S wrote:
>> As the result blocks for WM1-WM7 are always kept higher than the
>> level below the present level, make sure result lines are also higher
>> than the level below for WM1-WM7.
>>
>> Signed-off-by: Karthik B S <karthik.b.s at intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_pm.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index b5db6a3..cc41009 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -4704,6 +4704,8 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
>>   	if (level >= 1 && level <= 7) {
>>   		if (result_prev->plane_res_b > res_blocks)
>>   			res_blocks = result_prev->plane_res_b;
>> +		if (result_prev->plane_res_l > res_lines)
>> +			res_lines = result_prev->plane_res_l;
>>   	}
>>   
>>   	if (INTEL_GEN(dev_priv) >= 11) {
>> -- 
>> 2.7.4
>>