[Intel-gfx] [PATCH 3/3] drm: add LG eDP panel to quirk database

[Jani Nikula]

On Mon, 10 Sep 2018, "Lee, Shawn C" <shawn.c.lee at intel.com> wrote:
> The N value was computed by kernel driver that based on synchronous clock
> mode. But only specific N value (0x8000) would be acceptable for
> LG LP140WF6-SPM1 eDP panel which is running at asynchronous clock mode.
> With the other N value, Tcon will enter BITS mode and display black screen.
> Add this panel into quirk database and give particular N value when
> calculate M/N divider.
>
> Cc: Jani Nikula <jani.nikula at intel.com>
> Cc: Cooper Chiou <cooper.chiou at intel.com>
> Cc: Matt Atwood <matthew.s.atwood at intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
> Cc: Clint Taylor <clinton.a.taylor at intel.com>
> Signed-off-by: Lee, Shawn C <shawn.c.lee at intel.com>

No access to the panel or its details, so instead of review,

Acked-by: Jani Nikula <jani.nikula at intel.com>

> ---
>  drivers/gpu/drm/drm_dp_helper.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
> index d0c1250975ab..0ef7c43a9025 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -1270,6 +1270,8 @@ struct dpcd_quirk {
>  static const struct dpcd_quirk dpcd_quirk_list[] = {
>  	/* Analogix 7737 needs reduced M and N at HBR2 link rates */
>  	{ OUI(0x00, 0x22, 0xb9), DEVICE_ID_ANY, true, BIT(DP_DPCD_QUIRK_CONSTANT_N) },
> +	/* LG LP140WF6-SPM1 eDP panel */
> +	{ OUI(0x00, 0x22, 0xb9), DEVICE_ID('s', 'i', 'v', 'a', 'r', 'T'), false, BIT(DP_DPCD_QUIRK_CONSTANT_N) },
>  };
>  
>  #undef OUI

-- 
Jani Nikula, Intel Open Source Graphics Center