[Intel-gfx] [PATCH v2 09/23] drm/dsc: Define Rate Control values that do not change over configurations

[Manasi Navare]

On Tue, Jul 31, 2018 at 02:07:05PM -0700, Manasi Navare wrote:
> From: "Srivatsa, Anusha" <anusha.srivatsa at intel.com>
> 
> DSC has some Rate Control values that remain constant
> across all configurations. These are as per the DSC
> standard.
> 
> v3:
> * Define them in drm_dsc.h as they are
> DSC constants (Manasi)
> v2:
> * Add DP_DSC_ prefix (Jani Nikula)
> 
> Cc: dri-devel at lists.freedesktop.org
> Cc: Manasi Navare <manasi.d.navare at intel.com>
> Cc: Jani Nikula <jani.nikula at linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala at linux.intel.com>
> Cc: Gaurav K Singh <gaurav.k.singh at intel.com>
> Cc: Harry Wentland <harry.wentland at amd.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>

Tested and double checked the values with DSC spec so
Reviewed-by: Manasi Navare <manasi.d.navare at intel.com>

> ---
>  include/drm/drm_dsc.h | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h
> index eda323d..ebd99d7 100644
> --- a/include/drm/drm_dsc.h
> +++ b/include/drm/drm_dsc.h
> @@ -33,6 +33,12 @@
>  #define DSC_MUX_WORD_SIZE_8_10_BPC	48
>  #define DSC_MUX_WORD_SIZE_12_BPC	64
>  
> +/* DSC Rate Control Constants */
> +#define DSC_RC_MODEL_SIZE_CONST		    8192
> +#define DSC_RC_EDGE_FACTOR_CONST	    6
> +#define DSC_RC_TGT_OFFSET_HI_CONST	    3
> +#define DSC_RC_TGT_OFFSET_LO_CONST	    3
> +
>  /* Configuration for a single Rate Control model range */
>  struct dsc_rc_range_parameters {
>  	/* Min Quantization Parameters allowed for this range */
> -- 
> 2.7.4
>