[Intel-gfx] [PATCH] drm/i915: Make 48bit full ppgtt configuration generic (v3)

[Chris Wilson]

Quoting Bob Paauwe (2018-09-10 21:34:00)
> On Mon, 10 Sep 2018 20:56:51 +0100
> Chris Wilson <chris at chris-wilson.co.uk> wrote:
> 
> > Quoting Bob Paauwe (2018-09-10 18:12:25)
> > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > > index d6f7b9fe1d26..e0619952ff52 100644
> > > --- a/drivers/gpu/drm/i915/i915_pci.c
> > > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > > @@ -299,6 +299,7 @@ static const struct intel_device_info intel_sandybridge_m_gt2_info = {
> > >         .has_rc6p = 1, \
> > >         .has_aliasing_ppgtt = 1, \
> > >         .has_full_ppgtt = 1, \
> > > +       .full_ppgtt_bits = 32, \
> > >         GEN_DEFAULT_PIPEOFFSETS, \
> > >         GEN_DEFAULT_PAGE_SIZES, \
> > >         IVB_CURSOR_OFFSETS
> > > @@ -353,6 +354,7 @@ static const struct intel_device_info intel_valleyview_info = {
> > >         .has_hotplug = 1,
> > >         .has_aliasing_ppgtt = 1,
> > >         .has_full_ppgtt = 1,
> > > +       .full_ppgtt_bits = 32,
> > >         .has_snoop = true,
> > >         .has_coherent_ggtt = false,
> > >         .ring_mask = RENDER_RING | BSD_RING | BLT_RING,  
> > 
> > To be pedant, .bits = 31 for gen6/7.
> > -Chris
> 
> If I'm reading the code right, these use a different method of setting
> the vm.total so won't use the .full_ppgtt_bits.
> 
> I don't know enough about this, but would it make sense to modify
> gen6_ppgtt_create() to use .full_ppgtt_bits (with it set correctly to
> 31) or maybe just not set .full_ppgtt_bits for those platforms or set
> the value correctly and ignore it for now?

One of our goals is to remove the differences where none exist...
-Chris