[Intel-gfx] [RFC PATCH] drm/i915: split GVT as separated module
Zhenyu Wang
zhenyuw at linux.intel.com
Thu Sep 13 05:26:12 UTC 2018
Joonas requested if we could move GVT into separated module.
Then obvious requirement is to export i915 functions that GVT
currently use. So this one blindly trys to export all of them
for people to review. Some of them are already only for GVT now.
But more others might need more thinking on what may better fit.
With separated module, this also changes how GVT module loads with
i915. Initial attempt was to request loading GVT module when i915
init, but as for dependence issue that couldn't work. Then I think we
should just enable GVT when user request to load it. So removed GVT
init from i915, also 'enable_gvt' parameter and call GVT init function
when module load. But for GVT init, we still need struct
drm_i915_private for target device, so this just hacks it to
export..Maybe we can add some interface to get that from i915?
Another problem for separated module is that GVT wants a clean
initial MMIO snapshot for vGPU default state. Now in upstream we
will take that snapshot during GVT init. For separated module, we
might need i915 to dump it for GVT then GVT could get it when init.
This part of change for i915 and GVT is not included in this patch yet.
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw at linux.intel.com>
---
drivers/gpu/drm/i915/Kconfig | 2 +-
drivers/gpu/drm/i915/Makefile | 3 -
drivers/gpu/drm/i915/gvt/Makefile | 3 +-
drivers/gpu/drm/i915/gvt/gvt.c | 40 +++++-
drivers/gpu/drm/i915/gvt/gvt.h | 3 +
drivers/gpu/drm/i915/i915_drv.c | 17 +--
drivers/gpu/drm/i915/i915_drv.h | 6 +-
drivers/gpu/drm/i915/i915_gem.c | 11 ++
drivers/gpu/drm/i915/i915_gem_context.c | 2 +
drivers/gpu/drm/i915/i915_gem_dmabuf.c | 1 +
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 2 +
drivers/gpu/drm/i915/i915_gem_gtt.c | 1 +
drivers/gpu/drm/i915/i915_params.c | 3 -
drivers/gpu/drm/i915/i915_params.h | 3 +-
drivers/gpu/drm/i915/i915_request.c | 3 +
drivers/gpu/drm/i915/i915_vma.c | 2 +
drivers/gpu/drm/i915/intel_gvt.c | 143 ----------------------
drivers/gpu/drm/i915/intel_gvt.h | 50 --------
drivers/gpu/drm/i915/intel_ringbuffer.c | 1 +
drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +
drivers/gpu/drm/i915/intel_uncore.c | 3 +
21 files changed, 82 insertions(+), 219 deletions(-)
delete mode 100644 drivers/gpu/drm/i915/intel_gvt.c
delete mode 100644 drivers/gpu/drm/i915/intel_gvt.h
diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 33a458b7f1fc..a05261cabf53 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -96,7 +96,7 @@ config DRM_I915_USERPTR
If in doubt, say "Y".
config DRM_I915_GVT
- bool "Enable Intel GVT-g graphics virtualization host support"
+ tristate "Enable Intel GVT-g graphics virtualization host support"
depends on DRM_I915
depends on 64BIT
default n
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 5794f102f9b8..b3acd431c35e 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -182,10 +182,7 @@ i915-y += i915_perf.o \
i915_oa_cnl.o \
i915_oa_icl.o
-ifeq ($(CONFIG_DRM_I915_GVT),y)
-i915-y += intel_gvt.o
include $(src)/gvt/Makefile
-endif
# LPE Audio for VLV and CHT
i915-y += intel_lpe_audio.o
diff --git a/drivers/gpu/drm/i915/gvt/Makefile b/drivers/gpu/drm/i915/gvt/Makefile
index b016dc753db9..a2e1de745d63 100644
--- a/drivers/gpu/drm/i915/gvt/Makefile
+++ b/drivers/gpu/drm/i915/gvt/Makefile
@@ -6,5 +6,6 @@ GVT_SOURCE := gvt.o aperture_gm.o handlers.o vgpu.o trace_points.o firmware.o \
fb_decoder.o dmabuf.o page_track.o
ccflags-y += -I$(src) -I$(src)/$(GVT_DIR)
-i915-y += $(addprefix $(GVT_DIR)/, $(GVT_SOURCE))
+i915_gvt-y := $(addprefix $(GVT_DIR)/, $(GVT_SOURCE))
+obj-$(CONFIG_DRM_I915_GVT) += i915_gvt.o
obj-$(CONFIG_DRM_I915_GVT_KVMGT) += $(GVT_DIR)/kvmgt.o
diff --git a/drivers/gpu/drm/i915/gvt/gvt.c b/drivers/gpu/drm/i915/gvt/gvt.c
index 6ef5a7fc70df..2a6bbc89e20f 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.c
+++ b/drivers/gpu/drm/i915/gvt/gvt.c
@@ -30,10 +30,11 @@
*
*/
+#include <linux/init.h>
#include <linux/types.h>
#include <xen/xen.h>
#include <linux/kthread.h>
-
+#include <linux/module.h>
#include "i915_drv.h"
#include "gvt.h"
#include <linux/vfio.h>
@@ -228,7 +229,6 @@ int intel_gvt_init_host(void)
gvt_dbg_core("Running with hypervisor %s in host mode\n",
supported_hypervisors[intel_gvt_host.hypervisor_type]);
-
intel_gvt_host.initialized = true;
return 0;
}
@@ -467,6 +467,42 @@ int intel_gvt_init_device(struct drm_i915_private *dev_priv)
return ret;
}
+static int __init i915_gvt_init(void)
+{
+ if (!try_module_get(i915_priv_export->drm.dev->driver->owner)) {
+ gvt_err("get i915 module fail\n");
+ return -1;
+ }
+
+ if (intel_gvt_init_host()) {
+ gvt_err("init host fail\n");
+ goto err;
+ }
+ if (intel_gvt_init_device(i915_priv_export)) {
+ gvt_err("init device fail\n");
+ goto err;
+ }
+
+ return 0;
+err:
+ module_put(i915_priv_export->drm.dev->driver->owner);
+ return -1;
+}
+
+static void __exit i915_gvt_exit(void)
+{
+ if (!intel_gvt_active(i915_priv_export))
+ return;
+ intel_gvt_clean_device(i915_priv_export);
+ module_put(i915_priv_export->drm.dev->driver->owner);
+}
+
+module_init(i915_gvt_init);
+module_exit(i915_gvt_exit);
+
#if IS_ENABLED(CONFIG_DRM_I915_GVT_KVMGT)
MODULE_SOFTDEP("pre: kvmgt");
#endif
+
+MODULE_LICENSE("GPL and additional rights");
+MODULE_AUTHOR("Intel Corporation");
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index 31f6cdbe5c42..f5e9869ae91a 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -480,6 +480,9 @@ static inline void intel_vgpu_write_pci_bar(struct intel_vgpu *vgpu,
int intel_gvt_init_vgpu_types(struct intel_gvt *gvt);
void intel_gvt_clean_vgpu_types(struct intel_gvt *gvt);
+extern int intel_gvt_init_device(struct drm_i915_private *dev_priv);
+extern void intel_gvt_clean_device(struct drm_i915_private *dev_priv);
+extern int intel_gvt_init_host(void);
struct intel_vgpu *intel_gvt_create_idle_vgpu(struct intel_gvt *gvt);
void intel_gvt_destroy_idle_vgpu(struct intel_vgpu *vgpu);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 77a4a01ddc08..4ad96654d981 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1072,8 +1072,6 @@ static void intel_sanitize_options(struct drm_i915_private *dev_priv)
intel_sanitize_enable_ppgtt(dev_priv,
i915_modparams.enable_ppgtt);
DRM_DEBUG_DRIVER("ppgtt mode: %i\n", i915_modparams.enable_ppgtt);
-
- intel_gvt_sanitize_options(dev_priv);
}
/**
@@ -1188,18 +1186,10 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
DRM_DEBUG_DRIVER("can't enable MSI");
}
- ret = intel_gvt_init(dev_priv);
- if (ret)
- goto err_msi;
-
intel_opregion_setup(dev_priv);
return 0;
-err_msi:
- if (pdev->msi_enabled)
- pci_disable_msi(pdev);
- pm_qos_remove_request(&dev_priv->pm_qos);
err_ggtt:
i915_ggtt_cleanup_hw(dev_priv);
err_perf:
@@ -1335,6 +1325,9 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
DRM_INFO("DRM_I915_DEBUG_RUNTIME_PM enabled\n");
}
+struct drm_i915_private *i915_priv_export;
+EXPORT_SYMBOL_GPL(i915_priv_export);
+
/**
* i915_driver_load - setup chip and create an initial config
* @pdev: PCI device
@@ -1412,6 +1405,8 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
i915_welcome_messages(dev_priv);
+ i915_priv_export = dev_priv;
+
return 0;
out_cleanup_hw:
@@ -1446,8 +1441,6 @@ void i915_driver_unload(struct drm_device *dev)
drm_atomic_helper_shutdown(dev);
- intel_gvt_cleanup(dev_priv);
-
intel_modeset_cleanup(dev);
intel_bios_cleanup(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e5b9d3c77139..c6389679b2a3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -79,8 +79,6 @@
#include "i915_timeline.h"
#include "i915_vma.h"
-#include "intel_gvt.h"
-
/* General customization:
*/
@@ -1584,6 +1582,8 @@ struct intel_cdclk_state {
u8 voltage_level;
};
+struct intel_gvt;
+
struct drm_i915_private {
struct drm_device drm;
@@ -3838,4 +3838,6 @@ static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)
return I915_HWS_CSB_WRITE_INDEX;
}
+extern struct drm_i915_private *i915_priv_export;
+
#endif
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0453eb42a1a3..3c9460969dfc 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -701,6 +701,7 @@ void *i915_gem_object_alloc(struct drm_i915_private *dev_priv)
{
return kmem_cache_zalloc(dev_priv->objects, GFP_KERNEL);
}
+EXPORT_SYMBOL_GPL(i915_gem_object_alloc);
void i915_gem_object_free(struct drm_i915_gem_object *obj)
{
@@ -1029,6 +1030,7 @@ int i915_gem_obj_prepare_shmem_write(struct drm_i915_gem_object *obj,
i915_gem_object_unpin_pages(obj);
return ret;
}
+EXPORT_SYMBOL_GPL(i915_gem_obj_prepare_shmem_write);
static void
shmem_clflush_swizzled_range(char *addr, unsigned long length,
@@ -2730,6 +2732,7 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
list_add(&obj->mm.link, &i915->mm.unbound_list);
spin_unlock(&i915->mm.obj_lock);
}
+EXPORT_SYMBOL_GPL(__i915_gem_object_set_pages);
static int ____i915_gem_object_get_pages(struct drm_i915_gem_object *obj)
{
@@ -2896,6 +2899,7 @@ void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
ptr = ERR_PTR(ret);
goto out_unlock;
}
+EXPORT_SYMBOL_GPL(i915_gem_object_pin_map);
static int
i915_gem_object_pwrite_gtt(struct drm_i915_gem_object *obj,
@@ -3999,6 +4003,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)
i915_gem_object_unpin_pages(obj);
return 0;
}
+EXPORT_SYMBOL_GPL(i915_gem_object_set_to_gtt_domain);
/**
* Changes the cache-level of an object across all VMA.
@@ -4364,6 +4369,7 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)
return 0;
}
+EXPORT_SYMBOL_GPL(i915_gem_object_set_to_cpu_domain);
/* Throttle our rendering by waiting until the ring has completed our requests
* emitted over 20 msec ago.
@@ -4493,6 +4499,7 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
return vma;
}
+EXPORT_SYMBOL_GPL(i915_gem_object_ggtt_pin);
static __always_inline unsigned int __busy_read_flag(unsigned int id)
{
@@ -4714,6 +4721,7 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
i915_gem_info_add_obj(to_i915(obj->base.dev), obj->base.size);
}
+EXPORT_SYMBOL_GPL(i915_gem_object_init);
static const struct drm_i915_gem_object_ops i915_gem_object_ops = {
.flags = I915_GEM_OBJECT_HAS_STRUCT_PAGE |
@@ -4820,6 +4828,7 @@ i915_gem_object_create(struct drm_i915_private *dev_priv, u64 size)
i915_gem_object_free(obj);
return ERR_PTR(ret);
}
+EXPORT_SYMBOL_GPL(i915_gem_object_create);
static bool discard_backing_storage(struct drm_i915_gem_object *obj)
{
@@ -5010,6 +5019,7 @@ void __i915_gem_object_release_unless_active(struct drm_i915_gem_object *obj)
else
i915_gem_object_put(obj);
}
+EXPORT_SYMBOL_GPL(__i915_gem_object_release_unless_active);
void i915_gem_sanitize(struct drm_i915_private *i915)
{
@@ -6111,6 +6121,7 @@ i915_gem_object_get_page(struct drm_i915_gem_object *obj, unsigned int n)
sg = i915_gem_object_get_sg(obj, n, &offset);
return nth_page(sg_page(sg), offset);
}
+EXPORT_SYMBOL_GPL(i915_gem_object_get_page);
/* Like i915_gem_object_get_page(), but mark the returned page dirty */
struct page *
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index f15a039772db..d77fabc8571f 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -185,6 +185,7 @@ void i915_gem_context_release(struct kref *ref)
if (llist_add(&ctx->free_link, &i915->contexts.free_list))
queue_work(i915->wq, &i915->contexts.free_work);
}
+EXPORT_SYMBOL_GPL(i915_gem_context_release);
static void context_close(struct i915_gem_context *ctx)
{
@@ -420,6 +421,7 @@ i915_gem_context_create_gvt(struct drm_device *dev)
mutex_unlock(&dev->struct_mutex);
return ctx;
}
+EXPORT_SYMBOL_GPL(i915_gem_context_create_gvt);
struct i915_gem_context *
i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio)
diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
index 82e2ca17a441..ac98b094220c 100644
--- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
@@ -244,6 +244,7 @@ struct dma_buf *i915_gem_prime_export(struct drm_device *dev,
return drm_gem_dmabuf_export(dev, &exp_info);
}
+EXPORT_SYMBOL_GPL(i915_gem_prime_export);
static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
{
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index d548ac05ccd7..21b79c1f61d0 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -420,6 +420,7 @@ i915_reserve_fence(struct drm_i915_private *dev_priv)
list_del(&fence->link);
return fence;
}
+EXPORT_SYMBOL_GPL(i915_reserve_fence);
/**
* i915_unreserve_fence - Reclaim a reserved fence
@@ -433,6 +434,7 @@ void i915_unreserve_fence(struct drm_i915_fence_reg *fence)
list_add(&fence->link, &fence->i915->mm.fence_list);
}
+EXPORT_SYMBOL_GPL(i915_unreserve_fence);
/**
* i915_gem_revoke_fences - revoke fence state
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 4137af4bd8f5..80abcf23491a 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -4107,6 +4107,7 @@ int i915_gem_gtt_insert(struct i915_address_space *vm,
size, alignment, color,
start, end, DRM_MM_INSERT_EVICT);
}
+EXPORT_SYMBOL_GPL(i915_gem_gtt_insert);
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftests/mock_gtt.c"
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 295e981e4a39..8f56c25b6d7f 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -171,9 +171,6 @@ i915_param_named_unsafe(inject_load_failure, uint, 0400,
i915_param_named(enable_dpcd_backlight, bool, 0600,
"Enable support for DPCD backlight control (default:false)");
-i915_param_named(enable_gvt, bool, 0400,
- "Enable support for Intel GVT-g graphics virtualization host support(default:false)");
-
static __always_inline void _print_param(struct drm_printer *p,
const char *name,
const char *type,
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 6c4d4a21474b..16b8af6546c9 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -67,8 +67,7 @@ struct drm_printer;
param(bool, verbose_state_checks, true) \
param(bool, nuclear_pageflip, false) \
param(bool, enable_dp_mst, true) \
- param(bool, enable_dpcd_backlight, false) \
- param(bool, enable_gvt, false)
+ param(bool, enable_dpcd_backlight, false)
#define MEMBER(T, member, ...) T member;
struct i915_params {
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 09ed48833b54..d317ab59822c 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -839,6 +839,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct i915_gem_context *ctx)
intel_context_unpin(ce);
return ERR_PTR(ret);
}
+EXPORT_SYMBOL_GPL(i915_request_alloc);
static int
i915_request_await_request(struct i915_request *to, struct i915_request *from)
@@ -1151,6 +1152,7 @@ void i915_request_add(struct i915_request *request)
if (prev && i915_request_completed(prev))
i915_request_retire_upto(prev);
}
+EXPORT_SYMBOL_GPL(i915_request_add);
static unsigned long local_clock_us(unsigned int *cpu)
{
@@ -1415,6 +1417,7 @@ long i915_request_wait(struct i915_request *rq,
return timeout;
}
+EXPORT_SYMBOL_GPL(i915_request_wait);
static void ring_retire_requests(struct intel_ring *ring)
{
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 31efc971a3a8..9d333bab4039 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -783,6 +783,7 @@ void i915_vma_close(struct i915_vma *vma)
*/
list_add_tail(&vma->closed_link, &vma->vm->i915->gt.closed_vma);
}
+EXPORT_SYMBOL_GPL(i915_vma_close);
void i915_vma_reopen(struct i915_vma *vma)
{
@@ -1028,6 +1029,7 @@ int i915_vma_move_to_active(struct i915_vma *vma,
export_fence(vma, rq, flags);
return 0;
}
+EXPORT_SYMBOL_GPL(i915_vma_move_to_active);
int i915_vma_unbind(struct i915_vma *vma)
{
diff --git a/drivers/gpu/drm/i915/intel_gvt.c b/drivers/gpu/drm/i915/intel_gvt.c
deleted file mode 100644
index c22b3e18a0f5..000000000000
--- a/drivers/gpu/drm/i915/intel_gvt.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include "i915_drv.h"
-#include "intel_gvt.h"
-
-/**
- * DOC: Intel GVT-g host support
- *
- * Intel GVT-g is a graphics virtualization technology which shares the
- * GPU among multiple virtual machines on a time-sharing basis. Each
- * virtual machine is presented a virtual GPU (vGPU), which has equivalent
- * features as the underlying physical GPU (pGPU), so i915 driver can run
- * seamlessly in a virtual machine.
- *
- * To virtualize GPU resources GVT-g driver depends on hypervisor technology
- * e.g KVM/VFIO/mdev, Xen, etc. to provide resource access trapping capability
- * and be virtualized within GVT-g device module. More architectural design
- * doc is available on https://01.org/group/2230/documentation-list.
- */
-
-static bool is_supported_device(struct drm_i915_private *dev_priv)
-{
- if (IS_BROADWELL(dev_priv))
- return true;
- if (IS_SKYLAKE(dev_priv))
- return true;
- if (IS_KABYLAKE(dev_priv))
- return true;
- if (IS_BROXTON(dev_priv))
- return true;
- return false;
-}
-
-/**
- * intel_gvt_sanitize_options - sanitize GVT related options
- * @dev_priv: drm i915 private data
- *
- * This function is called at the i915 options sanitize stage.
- */
-void intel_gvt_sanitize_options(struct drm_i915_private *dev_priv)
-{
- if (!i915_modparams.enable_gvt)
- return;
-
- if (intel_vgpu_active(dev_priv)) {
- DRM_INFO("GVT-g is disabled for guest\n");
- goto bail;
- }
-
- if (!is_supported_device(dev_priv)) {
- DRM_INFO("Unsupported device. GVT-g is disabled\n");
- goto bail;
- }
-
- return;
-bail:
- i915_modparams.enable_gvt = 0;
-}
-
-/**
- * intel_gvt_init - initialize GVT components
- * @dev_priv: drm i915 private data
- *
- * This function is called at the initialization stage to create a GVT device.
- *
- * Returns:
- * Zero on success, negative error code if failed.
- *
- */
-int intel_gvt_init(struct drm_i915_private *dev_priv)
-{
- int ret;
-
- if (i915_inject_load_failure())
- return -ENODEV;
-
- if (!i915_modparams.enable_gvt) {
- DRM_DEBUG_DRIVER("GVT-g is disabled by kernel params\n");
- return 0;
- }
-
- if (USES_GUC_SUBMISSION(dev_priv)) {
- DRM_ERROR("i915 GVT-g loading failed due to Graphics virtualization is not yet supported with GuC submission\n");
- return -EIO;
- }
-
- /*
- * We're not in host or fail to find a MPT module, disable GVT-g
- */
- ret = intel_gvt_init_host();
- if (ret) {
- DRM_DEBUG_DRIVER("Not in host or MPT modules not found\n");
- goto bail;
- }
-
- ret = intel_gvt_init_device(dev_priv);
- if (ret) {
- DRM_DEBUG_DRIVER("Fail to init GVT device\n");
- goto bail;
- }
-
- return 0;
-
-bail:
- i915_modparams.enable_gvt = 0;
- return 0;
-}
-
-/**
- * intel_gvt_cleanup - cleanup GVT components when i915 driver is unloading
- * @dev_priv: drm i915 private *
- *
- * This function is called at the i915 driver unloading stage, to shutdown
- * GVT components and release the related resources.
- */
-void intel_gvt_cleanup(struct drm_i915_private *dev_priv)
-{
- if (!intel_gvt_active(dev_priv))
- return;
-
- intel_gvt_clean_device(dev_priv);
-}
diff --git a/drivers/gpu/drm/i915/intel_gvt.h b/drivers/gpu/drm/i915/intel_gvt.h
deleted file mode 100644
index 61b246470282..000000000000
--- a/drivers/gpu/drm/i915/intel_gvt.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef _INTEL_GVT_H_
-#define _INTEL_GVT_H_
-
-struct intel_gvt;
-
-#ifdef CONFIG_DRM_I915_GVT
-int intel_gvt_init(struct drm_i915_private *dev_priv);
-void intel_gvt_cleanup(struct drm_i915_private *dev_priv);
-int intel_gvt_init_device(struct drm_i915_private *dev_priv);
-void intel_gvt_clean_device(struct drm_i915_private *dev_priv);
-int intel_gvt_init_host(void);
-void intel_gvt_sanitize_options(struct drm_i915_private *dev_priv);
-#else
-static inline int intel_gvt_init(struct drm_i915_private *dev_priv)
-{
- return 0;
-}
-static inline void intel_gvt_cleanup(struct drm_i915_private *dev_priv)
-{
-}
-
-static inline void intel_gvt_sanitize_options(struct drm_i915_private *dev_priv)
-{
-}
-#endif
-
-#endif /* _INTEL_GVT_H_ */
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index d40f55a8dc34..946ab1bf9214 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1882,6 +1882,7 @@ u32 *intel_ring_begin(struct i915_request *rq, unsigned int num_dwords)
return cs;
}
+EXPORT_SYMBOL_GPL(intel_ring_begin);
/* Align the ring tail to a cacheline boundary */
int intel_ring_cacheline_align(struct i915_request *rq)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 480dadb1047b..c4c589c38c60 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -4020,6 +4020,7 @@ void intel_runtime_pm_get(struct drm_i915_private *dev_priv)
atomic_inc(&dev_priv->runtime_pm.wakeref_count);
assert_rpm_wakelock_held(dev_priv);
}
+EXPORT_SYMBOL_GPL(intel_runtime_pm_get);
/**
* intel_runtime_pm_get_if_in_use - grab a runtime pm reference if device in use
@@ -4103,6 +4104,7 @@ void intel_runtime_pm_put(struct drm_i915_private *dev_priv)
pm_runtime_mark_last_busy(kdev);
pm_runtime_put_autosuspend(kdev);
}
+EXPORT_SYMBOL_GPL(intel_runtime_pm_put);
/**
* intel_runtime_pm_enable - enable runtime pm
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 20f2f5ad9c3f..70abedfcb2f4 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -644,6 +644,7 @@ void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
__intel_uncore_forcewake_get(dev_priv, fw_domains);
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
+EXPORT_SYMBOL_GPL(intel_uncore_forcewake_get);
/**
* intel_uncore_forcewake_user_get - claim forcewake on behalf of userspace
@@ -756,6 +757,7 @@ void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
__intel_uncore_forcewake_put(dev_priv, fw_domains);
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
+EXPORT_SYMBOL_GPL(intel_uncore_forcewake_put);
/**
* intel_uncore_forcewake_put__locked - grab forcewake domain references
@@ -2380,6 +2382,7 @@ intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
return fw_domains;
}
+EXPORT_SYMBOL_GPL(intel_uncore_forcewake_for_reg);
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftests/mock_uncore.c"
--
2.19.0
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