[Intel-gfx] [PATCH] drm/i915/psr: Enable AUX-A IO power well on ICL for PSR
Imre Deak
imre.deak at intel.com
Fri Sep 14 13:33:30 UTC 2018
On Thu, Sep 13, 2018 at 05:18:22PM -0700, Dhinakaran Pandiyan wrote:
> PSR requires AUX IO power well to be enabled. This was already in place
> for CNL, extend this for ICL too. Not enabling the power well results in
> the aux error interrupts when the hardware exits PSR.
>
> Reported-by: Casey G Bowman <casey.g.bowman at intel.com>
> Reported-by: Jyoti R Yadav <jyoti.r.yadav at intel.com>
> Cc: Matt Atwood <matthew.s.atwood at intel.com>
> Cc: Jyoti R Yadav <jyoti.r.yadav at intel.com>
> Cc: Casey G Bowman <casey.g.bowman at intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
Reviewed-by: Imre Deak <imre.deak at intel.com>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 2 +-
> drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
> 2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index cd01a09c5e0f..b6910c8b4e08 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2077,7 +2077,7 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
> static inline enum intel_display_power_domain
> intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> {
> - /* CNL HW requires corresponding AUX IOs to be powered up for PSR with
> + /* CNL+ HW requires corresponding AUX IOs to be powered up for PSR with
> * DC states enabled at the same time, while for driver initiated AUX
> * transfers we need the same AUX IOs to be powered but with DC states
> * disabled. Accordingly use the AUX power domain here which leaves DC
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 9bebec389de1..0fdabce647ab 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -1996,6 +1996,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO))
>
> #define ICL_AUX_A_IO_POWER_DOMAINS ( \
> + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \
> BIT_ULL(POWER_DOMAIN_AUX_A))
> #define ICL_AUX_B_IO_POWER_DOMAINS ( \
> BIT_ULL(POWER_DOMAIN_AUX_B))
> --
> 2.17.1
>
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