[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Per context dynamic (sub)slice power-gating (rev4)

[Patchwork]

== Series Details ==

Series: Per context dynamic (sub)slice power-gating (rev4)
URL   : https://patchwork.freedesktop.org/series/48194/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
d32c1a36efbb drm/i915/execlists: Move RPCS setup to context pin
275b17e9ba45 drm/i915: Record the sseu configuration per-context & engine
15ae17fc2bb0 drm/i915/perf: lock powergating configuration to default when active
6c15d4d43452 drm/i915: Add timeline barrier support
f6f383926f56 drm/i915: Expose RPCS (SSEU) configuration to userspace
-:40: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#40: 
v2: Fix offset of CTX_R_PWR_CLK_STATE in intel_lr_context_set_sseu() (Lionel)

total: 0 errors, 1 warnings, 0 checks, 456 lines checked
00297a7d4c51 drm/i915/icl: Support co-existence between per-context SSEU and OA