[Intel-gfx] [igt-dev] [PATCH i-g-t v14 2/2] tests/gem_ctx_sseu: Dynamic (sub)slice programming tests

[Chris Wilson]

Quoting Tvrtko Ursulin (2018-09-17 12:28:12)
> From: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
> 
> Verify that the per-context dynamic SSEU uAPI works as expected.
> 
> To achieve that, in the absence of a better mechamism, we read the value
> of PWR_CLK_STATE register, or use MI_SET_PREDICATE on platforms before
> Cannonlake.
> 
> This register is written to by the GPU on context restore so this way
> we verify i915 is correctly updating the context image in all
> circumstances.
> 
> v2: Add subslice tests (Lionel)
>     Use MI_SET_PREDICATE for further verification when available (Lionel)
> 
> v3: Rename to gem_ctx_rpcs (Lionel)
> 
> v4: Update kernel API (Lionel)
>     Add 0 value test (Lionel)
>     Exercise invalid values (Lionel)
> 
> v5: Add perf tests (Lionel)
> 
> v6: Add new sysfs entry tests (Lionel)
> 
> v7: Test rsvd fields
>     Update for kernel series changes
> 
> v8: Drop test_no_sseu_support() test (Kelvin)
>     Drop drm_intel_*() apis (Chris)
> 
> v9: by Chris:
>     Drop all do_ioctl/do_ioctl_err()
>     Use gem_context_[gs]et_param()
>     Use gem_read() instead of mapping memory
>     by Lionel:
>     Test dynamic sseu on/off more
> 
> Tvrtko Ursulin:
> 
> v10:
>  * Various style tweaks and refactorings.
>  * New test coverage.
> 
> v11:
>  * Change platform support to just Gen11.
>  * Simplify availability test. (Chris Wilson)
>  * More invalid pointer tests. (Chris Wilson)
> 
> v12:
>  * Fix MAP_FIXED use (doh!).
>  * Fix get/set copy&paste errors.
>  * Drop supported platform test. (Chris Wilson)
>  * Add mmap__gtt test. (Chris Wilson)
> 
> v13:
>  * Commit message tweaks.
>  * Added reset/hang/suspend tests. (Chris Wilson)
>  * Assert spinner is busy. (Chris Wilson)
>  * Remove some more ABI assumptions. (Chris Wilson)
> 
> v14:
>  * Use default resume time. (Chris Wilson)
>  * Trigger hang after rpcs read batch has been submitted. (Chris Wilson)
> 
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

I can't think of any other mechanism that could interfere with ctx-sseu
that isn't being tested,
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris