[Intel-gfx] [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry.

[kbuild test robot]

Hi Jyoti,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.19-rc4 next-20180913]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Jyoti-Yadav/drm-i915-csr-Added-DC5-and-DC6-counter-register-for-ICL-in-debugfs-entry/20180918-012350
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-x005-201837 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

All errors (new ones prefixed by >>):

   drivers/gpu//drm/i915/i915_debugfs.c: In function 'i915_dmc_info':
>> drivers/gpu//drm/i915/i915_debugfs.c:2884:28: error: called object is not a function or function pointer
         (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))
         ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

vim +2884 drivers/gpu//drm/i915/i915_debugfs.c

  2861	
  2862	static int i915_dmc_info(struct seq_file *m, void *unused)
  2863	{
  2864		struct drm_i915_private *dev_priv = node_to_i915(m->private);
  2865		struct intel_csr *csr;
  2866	
  2867		if (!HAS_CSR(dev_priv))
  2868			return -ENODEV;
  2869	
  2870		csr = &dev_priv->csr;
  2871	
  2872		intel_runtime_pm_get(dev_priv);
  2873	
  2874		seq_printf(m, "fw loaded: %s\n", yesno(csr->dmc_payload != NULL));
  2875		seq_printf(m, "path: %s\n", csr->fw_path);
  2876	
  2877		if (!csr->dmc_payload)
  2878			goto out;
  2879	
  2880		seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version),
  2881			   CSR_VERSION_MINOR(csr->version));
  2882	
  2883		if (IS_KABYLAKE(dev_priv) ||
> 2884		    (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))
  2885			(IS_ICELAKE(dev_priv) && csr->version >= CSR_VERSION(1, 7))) {
  2886			seq_printf(m, "DC3 -> DC5 count: %d\n",
  2887				   I915_READ(SKL_CSR_DC3_DC5_COUNT));
  2888			seq_printf(m, "DC5 -> DC6 count: %d\n",
  2889				   I915_READ(SKL_CSR_DC5_DC6_COUNT));
  2890		} else if (IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) {
  2891			seq_printf(m, "DC3 -> DC5 count: %d\n",
  2892				   I915_READ(BXT_CSR_DC3_DC5_COUNT));
  2893		}
  2894	
  2895	out:
  2896		seq_printf(m, "program base: 0x%08x\n", I915_READ(CSR_PROGRAM(0)));
  2897		seq_printf(m, "ssp base: 0x%08x\n", I915_READ(CSR_SSP_BASE));
  2898		seq_printf(m, "htp: 0x%08x\n", I915_READ(CSR_HTP_SKL));
  2899	
  2900		intel_runtime_pm_put(dev_priv);
  2901	
  2902		return 0;
  2903	}
  2904	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
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