[Intel-gfx] [PATCH 02/10] drm/i915/icl: Disable master intr early

[Mika Kuoppala]

Disable master interrupt first before reading. This
guarantees that the sample we act upon is a frozen sample
of level indications and no interrupt was missed between
reading and disabling, possibly then ending up triggering
another interrupt later.

Cc: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 3d8c53bcbedb..1e05ffe16816 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3130,14 +3130,15 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
 	if (!intel_irqs_enabled(i915))
 		return IRQ_NONE;
 
-	master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
-	master_ctl &= ~GEN11_MASTER_IRQ;
-	if (!master_ctl)
-		return IRQ_NONE;
-
 	/* Disable interrupts. */
 	raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, 0);
 
+	master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ) & ~GEN11_MASTER_IRQ;
+	if (!master_ctl) {
+		raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
+		return IRQ_NONE;
+	}
+
 	/* Find, clear, then process each source of interrupt. */
 	gen11_gt_irq_handler(i915, master_ctl);
 
-- 
2.17.1