[Intel-gfx] [PATCH 10/18] drm/i915: Add the missing HDMI gamut metadata packet stuff

[Daniel Vetter]

On Thu, Sep 20, 2018 at 09:51:37PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> We have definitions and low level code for everything except the gamut
> metadata HDMI packet. Add the missing bits.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Online Bspec seems to have dropped pre-cpt/snb stuff, but I found some old copies
still :-)

Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---
>  drivers/gpu/drm/i915/i915_reg.h   |  4 +++-
>  drivers/gpu/drm/i915/intel_hdmi.c | 12 ++++++++++++
>  2 files changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 4948b352bf4c..c07fd394ca1d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4577,6 +4577,7 @@ enum {
>  #define   VIDEO_DIP_ENABLE_SPD		(8 << 21)
>  #define   VIDEO_DIP_SELECT_AVI		(0 << 19)
>  #define   VIDEO_DIP_SELECT_VENDOR	(1 << 19)
> +#define   VIDEO_DIP_SELECT_GAMUT	(2 << 19)
>  #define   VIDEO_DIP_SELECT_SPD		(3 << 19)
>  #define   VIDEO_DIP_SELECT_MASK		(3 << 19)
>  #define   VIDEO_DIP_FREQ_ONCE		(0 << 16)
> @@ -7948,10 +7949,11 @@ enum {
>  #define _ICL_VIDEO_DIP_PPS_ECC_B	0x613D4
>  
>  #define HSW_TVIDEO_DIP_CTL(trans)		_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_CTL_A)
> +#define HSW_TVIDEO_DIP_GCP(trans)		_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_GCP_A)
>  #define HSW_TVIDEO_DIP_AVI_DATA(trans, i)	_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_AVI_DATA_A + (i) * 4)
>  #define HSW_TVIDEO_DIP_VS_DATA(trans, i)	_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_VS_DATA_A + (i) * 4)
>  #define HSW_TVIDEO_DIP_SPD_DATA(trans, i)	_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_SPD_DATA_A + (i) * 4)
> -#define HSW_TVIDEO_DIP_GCP(trans)		_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_GCP_A)
> +#define HSW_TVIDEO_DIP_GMP_DATA(trans, i)	_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_GMP_DATA_A + (i) * 4)
>  #define HSW_TVIDEO_DIP_VSC_DATA(trans, i)	_MMIO_TRANS2(trans, _HSW_VIDEO_DIP_VSC_DATA_A + (i) * 4)
>  #define ICL_VIDEO_DIP_PPS_DATA(trans, i)	_MMIO_TRANS2(trans, _ICL_VIDEO_DIP_PPS_DATA_A + (i) * 4)
>  #define ICL_VIDEO_DIP_PPS_ECC(trans, i)		_MMIO_TRANS2(trans, _ICL_VIDEO_DIP_PPS_ECC_A + (i) * 4)
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index 454f570275e9..c3c2a638d062 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -83,6 +83,8 @@ static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector)
>  static u32 g4x_infoframe_index(unsigned int type)
>  {
>  	switch (type) {
> +	case HDMI_PACKET_TYPE_GAMUT_METADATA:
> +		return VIDEO_DIP_SELECT_GAMUT;
>  	case HDMI_INFOFRAME_TYPE_AVI:
>  		return VIDEO_DIP_SELECT_AVI;
>  	case HDMI_INFOFRAME_TYPE_SPD:
> @@ -98,6 +100,10 @@ static u32 g4x_infoframe_index(unsigned int type)
>  static u32 g4x_infoframe_enable(unsigned int type)
>  {
>  	switch (type) {
> +	case HDMI_PACKET_TYPE_GENERAL_CONTROL:
> +		return VIDEO_DIP_ENABLE_GCP;
> +	case HDMI_PACKET_TYPE_GAMUT_METADATA:
> +		return VIDEO_DIP_ENABLE_GAMUT;
>  	case HDMI_INFOFRAME_TYPE_AVI:
>  		return VIDEO_DIP_ENABLE_AVI;
>  	case HDMI_INFOFRAME_TYPE_SPD:
> @@ -113,6 +119,10 @@ static u32 g4x_infoframe_enable(unsigned int type)
>  static u32 hsw_infoframe_enable(unsigned int type)
>  {
>  	switch (type) {
> +	case HDMI_PACKET_TYPE_GENERAL_CONTROL:
> +		return VIDEO_DIP_ENABLE_GCP_HSW;
> +	case HDMI_PACKET_TYPE_GAMUT_METADATA:
> +		return VIDEO_DIP_ENABLE_GMP_HSW;
>  	case DP_SDP_VSC:
>  		return VIDEO_DIP_ENABLE_VSC_HSW;
>  	case HDMI_INFOFRAME_TYPE_AVI:
> @@ -134,6 +144,8 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv,
>  		 int i)
>  {
>  	switch (type) {
> +	case HDMI_PACKET_TYPE_GAMUT_METADATA:
> +		return HSW_TVIDEO_DIP_GMP_DATA(cpu_transcoder, i);
>  	case DP_SDP_VSC:
>  		return HSW_TVIDEO_DIP_VSC_DATA(cpu_transcoder, i);
>  	case HDMI_INFOFRAME_TYPE_AVI:
> -- 
> 2.16.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch