[Intel-gfx] [PATCH v3 8/8] drm/i915: Bump gen7+ fb size limits to 16kx16k

[Ville Syrjälä]

On Tue, Sep 25, 2018 at 08:59:03PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjala (2018-09-25 20:37:14)
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > With gtt remapping in place we can use arbitrarily large
> > framebuffers. Let's bump the limits to 16kx16k on gen7+.
> > The limit was chosen to match the maximum 2D surface size
> > of the 3D engine.
> > 
> > With the remapping we could easily go higher than that for the
> > display engine. However the modesetting ddx will blindly assume
> > it can handle whatever is reported via kms. The oversized
> > buffer dimensions are not caught by glamor nor Mesa until
> > finally an assert will trip when genxml attempts to pack the
> > SURFACE_STATE. So we pick a safe limit to avoid the X server
> > from crashing (or potentially misbehaving if the genxml asserts
> > are compiled out).
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 18 ++++++++++++------
> >  1 file changed, 12 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index d533a6086169..241b9f6cbb76 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -15524,16 +15524,22 @@ int intel_modeset_init(struct drm_device *dev)
> >                 }
> >         }
> >  
> > -       /* maximum framebuffer dimensions */
> > -       if (IS_GEN2(dev_priv)) {
> > -               dev->mode_config.max_width = 2048;
> > -               dev->mode_config.max_height = 2048;
> > +       /*
> > +        * Maximum framebuffer dimensions, chosen to match
> > +        * the maximum render engine surface size on gen4+.
> > +        */
> > +       if (INTEL_GEN(dev_priv) >= 7) {
> > +               dev->mode_config.max_width = 16384;
> > +               dev->mode_config.max_height = 16384;
> > +       } else if (INTEL_GEN(dev_priv) >= 4) {
> > +               dev->mode_config.max_width = 8192;
> > +               dev->mode_config.max_height = 8192;
> >         } else if (IS_GEN3(dev_priv)) {
> >                 dev->mode_config.max_width = 4096;
> >                 dev->mode_config.max_height = 4096;
> 
> You have the same problem on gen3 then. 3D pipeline is restricted to 2k.
> Different rules for different gen. :(

Yeah. That is a bit annoying. It's a pre-existing condition though
so I think we can safely assume that no one wants to use glamor
on gen3. Also IIRC Mesa/i915 has a sw fallback for this so at
least it shouldn't totally explode if someone did try it.

-- 
Ville Syrjälä
Intel