[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915 pvmmio to improve GVTg performance
Patchwork
patchwork at emeril.freedesktop.org
Thu Sep 27 07:20:43 UTC 2018
== Series Details ==
Series: i915 pvmmio to improve GVTg performance
URL : https://patchwork.freedesktop.org/series/50257/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b7754818ea52 drm/i915/gvt: add module parameter enable_pvmmio
-:25: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'level' may be better as '(level)' to avoid precedence issues
#25: FILE: drivers/gpu/drm/i915/i915_drv.h:3876:
+#define PVMMIO_LEVEL_ENABLE(dev_priv, level) \
+ (intel_vgpu_active(dev_priv) && i915_modparams.enable_pvmmio & level)
-:38: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#38: FILE: drivers/gpu/drm/i915/i915_params.c:178:
+i915_param_named(enable_pvmmio, int, 0400,
+ "Enable pv mmio feature, default TRUE. This parameter "
-:113: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#113: FILE: drivers/gpu/drm/i915/i915_vgpu.c:85:
+ __raw_i915_write32(dev_priv, vgtif_reg(enable_pvmmio),
+ i915_modparams.enable_pvmmio);
-:115: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#115: FILE: drivers/gpu/drm/i915/i915_vgpu.c:87:
+ i915_modparams.enable_pvmmio = __raw_i915_read32(dev_priv,
+ vgtif_reg(enable_pvmmio));
-:120: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#120: FILE: drivers/gpu/drm/i915/i915_vgpu.c:91:
+ DRM_INFO("Virtual GPU for Intel GVT-g detected with pvmmio 0x%x\n",
+ i915_modparams.enable_pvmmio);
total: 0 errors, 0 warnings, 5 checks, 80 lines checked
164efba08cbe drm/i915/gvt: get ready of memory for pvmmio
-:63: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#63: FILE: drivers/gpu/drm/i915/i915_drv.h:1630:
+ spinlock_t shared_page_lock;
-:137: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#137: FILE: drivers/gpu/drm/i915/i915_vgpu.c:103:
+ __raw_i915_write32(dev_priv, vgtif_reg(shared_page_gpa.lo),
+ lower_32_bits(shared_page_gpa));
-:139: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#139: FILE: drivers/gpu/drm/i915/i915_vgpu.c:105:
+ __raw_i915_write32(dev_priv, vgtif_reg(shared_page_gpa.hi),
+ upper_32_bits(shared_page_gpa));
total: 0 errors, 0 warnings, 3 checks, 105 lines checked
ec9f5f379874 drm/i915/gvt: context submission pvmmio optimization
f520b54318b0 drm/i915/gvt: master irq pvmmio optimization
4300a40028a1 drm/i915/gvt: ppgtt update pvmmio optimization
82d8fd860bb7 drm/i915/gvt: GVTg handle enable_pvmmio PVINFO register
-:24: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#24: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1249:
+ DRM_INFO("vgpu id=%d pvmmio=0x%x\n",
+ vgpu->id, VGPU_PVMMIO(vgpu));
total: 0 errors, 0 warnings, 1 checks, 46 lines checked
460761b5ad2c drm/i915/gvt: GVTg read_shared_page implementation
-:32: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#32: FILE: drivers/gpu/drm/i915/gvt/gvt.h:695:
+void intel_gvt_read_shared_page(struct intel_vgpu *vgpu,
+ unsigned int offset, void *buf, unsigned long len);
-:47: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#47: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1257:
+ vgpu->shared_page_gpa = vgpu_vreg64_t(vgpu,
+ vgtif_reg(shared_page_gpa));
-:65: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#65: FILE: drivers/gpu/drm/i915/gvt/vgpu.c:598:
+void intel_gvt_read_shared_page(struct intel_vgpu *vgpu,
+ unsigned int offset, void *buf, unsigned long len)
total: 0 errors, 0 warnings, 3 checks, 44 lines checked
a7fbe585aa4e drm/i915/gvt: GVTg support context submission pvmmio optimization
8399e7a93462 drm/i915/gvt: GVTg support master irq pvmmio optimization
97b377e08a05 drm/i915/gvt: GVTg support ppgtt pvmmio optimization
-:74: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#74: FILE: drivers/gpu/drm/i915/gvt/gtt.c:1810:
+ gvt_vgpu_err("fail to create ppgtt for pdp 0x%llx\n",
+ px_dma(&mm->ppgtt->pml4));
-:104: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#104: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2819:
+int intel_vgpu_g2v_pv_ppgtt_alloc_4lvl(struct intel_vgpu *vgpu,
+ u64 pdps[])
-:129: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#129: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2844:
+int intel_vgpu_g2v_pv_ppgtt_clear_4lvl(struct intel_vgpu *vgpu,
+ u64 pdps[])
-:157: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'end' - possible side-effects?
#157: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2872:
+#define pml4_addr_end(addr, end) \
+({ unsigned long __boundary = \
+ ((addr) + GEN8_PML4E_SIZE) & GEN8_PML4E_SIZE_MASK; \
+ (__boundary < (end)) ? __boundary : (end); \
+})
-:163: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'end' - possible side-effects?
#163: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2878:
+#define pdp_addr_end(addr, end) \
+({ unsigned long __boundary = \
+ ((addr) + GEN8_PDPE_SIZE) & GEN8_PDPE_SIZE_MASK; \
+ (__boundary < (end)) ? __boundary : (end); \
+})
-:169: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'end' - possible side-effects?
#169: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2884:
+#define pd_addr_end(addr, end) \
+({ unsigned long __boundary = \
+ ((addr) + GEN8_PDE_SIZE) & GEN8_PDE_SIZE_MASK; \
+ (__boundary < (end)) ? __boundary : (end); \
+})
-:182: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#182: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2897:
+static int walk_pt_range(struct intel_vgpu *vgpu, u64 pt,
+ u64 start, u64 end, struct ppgtt_walk *walk)
-:195: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#195: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2910:
+ ret = intel_gvt_hypervisor_read_gpa(vgpu,
+ (pt & PAGE_MASK) + (start_index << info->gtt_entry_size_shift),
-:216: CHECK:LINE_SPACING: Please don't use multiple blank lines
#216: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2931:
+
+
-:218: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#218: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2933:
+static int walk_pd_range(struct intel_vgpu *vgpu, u64 pd,
+ u64 start, u64 end, struct ppgtt_walk *walk)
-:230: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#230: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2945:
+ ret = intel_gvt_hypervisor_read_gpa(vgpu,
+ (pd & PAGE_MASK) + (index <<
-:243: CHECK:LINE_SPACING: Please don't use multiple blank lines
#243: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2958:
+
+
-:245: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#245: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2960:
+static int walk_pdp_range(struct intel_vgpu *vgpu, u64 pdp,
+ u64 start, u64 end, struct ppgtt_walk *walk)
-:257: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#257: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2972:
+ ret = intel_gvt_hypervisor_read_gpa(vgpu,
+ (pdp & PAGE_MASK) + (index <<
-:269: CHECK:LINE_SPACING: Please don't use multiple blank lines
#269: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2984:
+
+
-:271: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#271: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2986:
+static int walk_pml4_range(struct intel_vgpu *vgpu, u64 pml4,
+ u64 start, u64 end, struct ppgtt_walk *walk)
-:282: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#282: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2997:
+ ret = intel_gvt_hypervisor_read_gpa(vgpu,
+ (pml4 & PAGE_MASK) + (index <<
-:295: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#295: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3010:
+int intel_vgpu_g2v_pv_ppgtt_insert_4lvl(struct intel_vgpu *vgpu,
+ u64 pdps[])
-:329: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#329: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3044:
+ walk.mfns = kmalloc_array(num_pages,
+ sizeof(unsigned long), GFP_KERNEL);
-:389: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#389: FILE: drivers/gpu/drm/i915/gvt/gtt.h:277:
+int intel_vgpu_g2v_pv_ppgtt_alloc_4lvl(struct intel_vgpu *vgpu,
+ u64 pdps[]);
-:392: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#392: FILE: drivers/gpu/drm/i915/gvt/gtt.h:280:
+int intel_vgpu_g2v_pv_ppgtt_clear_4lvl(struct intel_vgpu *vgpu,
+ u64 pdps[]);
-:395: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#395: FILE: drivers/gpu/drm/i915/gvt/gtt.h:283:
+int intel_vgpu_g2v_pv_ppgtt_insert_4lvl(struct intel_vgpu *vgpu,
+ u64 pdps[]);
total: 0 errors, 0 warnings, 22 checks, 395 lines checked
More information about the Intel-gfx
mailing list