[Intel-gfx] [PATCH 1/2] drm/edid: Add a EDID edp panel quirk for forcing max lane count

[Clinton Taylor]

On 4/2/19 2:52 PM, Manasi Navare wrote:
> For certain eDP 1.4 panels, we need to use max lane count for the
> link training to succeed.
>
> This patch adds a EDID quirk for such eDP panels using
> their vendor ID and product ID to force using max lane count in the driver.
>
> Cc: Clint Taylor <Clinton.A.Taylor at intel.com>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Tested-by: Albert Astals Cid <aacid at kde.org>
> Tested-by: Emanuele Panigati <ilpanich at gmail.com>
> Tested-by: Ralgor <ralgorfdb at compuspex.org>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109959
> Signed-off-by: Manasi Navare <manasi.d.navare at intel.com>
> ---
>   drivers/gpu/drm/drm_edid.c  | 10 ++++++++++
>   include/drm/drm_connector.h |  5 +++++
>   2 files changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 2c22ea446075..fbc661806484 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -82,6 +82,8 @@
>   #define EDID_QUIRK_FORCE_10BPC			(1 << 11)
>   /* Non desktop display (i.e. HMD) */
>   #define EDID_QUIRK_NON_DESKTOP			(1 << 12)
> +/* Force max lane count */

Nit. Would like a little more descriptive comment about this quirk. 
Maybe even /* Force use of max lane count for link training */

> +#define EDID_QUIRK_FORCE_MAX_LANE_COUNT		(1 << 13)
>   
>   struct detailed_mode_closure {
>   	struct drm_connector *connector;
> @@ -189,6 +191,10 @@ static const struct edid_quirk {
>   
>   	/* OSVR HDK and HDK2 VR Headsets */
>   	{ "SVR", 0x1019, EDID_QUIRK_NON_DESKTOP },
> +
> +	/* SHP eDP 1.4 panel only works with max lane count */
> +	{ "SHP", 0x149a, EDID_QUIRK_FORCE_MAX_LANE_COUNT },
> +	{ "SHP", 0x148e, EDID_QUIRK_FORCE_MAX_LANE_COUNT },
>   };
>   
>   /*
> @@ -4463,6 +4469,7 @@ drm_reset_display_info(struct drm_connector *connector)
>   	memset(&info->hdmi, 0, sizeof(info->hdmi));
>   
>   	info->non_desktop = 0;
> +	info->force_max_lane_count = 0;
>   }
>   
>   u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid)
> @@ -4744,6 +4751,9 @@ int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
>   	if (quirks & EDID_QUIRK_FORCE_12BPC)
>   		connector->display_info.bpc = 12;
>   
> +	if (quirks & EDID_QUIRK_FORCE_MAX_LANE_COUNT)
> +		connector->display_info.force_max_lane_count = true;
> +
>   	return num_modes;
>   }
>   EXPORT_SYMBOL(drm_add_edid_modes);
> diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> index 02a131202add..45436d40ffe3 100644
> --- a/include/drm/drm_connector.h
> +++ b/include/drm/drm_connector.h
> @@ -457,6 +457,11 @@ struct drm_display_info {
>   	 * @non_desktop: Non desktop display (HMD).
>   	 */
>   	bool non_desktop;
> +
> +	/**
> +	 * @force_max_lane_count: Link training requires max lane count to pass
> +	 */
> +	bool force_max_lane_count;
>   };
>   
>   int drm_display_info_set_bus_formats(struct drm_display_info *info,

Rest of the patch appears sane for a quirk.

Reviewed-by: Clint Taylor <Clinton.A.Taylor at intel.com>

-Clint