[Intel-gfx] [PATCH 8/11 v2] NOT_UPSTREAM: drm/i915: Disable extra engines on older GuC FW

[John.C.Harrison at Intel.com]

From: John Harrison <John.C.Harrison at Intel.com>

The current GuC FW release (31.0.1) dies when presented with too many
media engines. The issue was fixed by 32.0.3 (which is the next FW the
driver is intending to switch to). It is desirable to merge the the
patches which allow use of the new engines before the new GuC FW
patches can be merged. E.g. for running in non-GuC mode and/or running
with a locally patched driver for the newer FW. Hence this patch
disables the extra engines if the newer FW is not found.

v2: Cope with GuC FWs loaded via the module param (by just ignoring it
and warning the user). [Daniele]

Signed-off-by: John Harrison <John.C.Harrison at Intel.com>
CC: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
---
 drivers/gpu/drm/i915/intel_device_info.c | 24 ++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_guc_fw.c      |  1 +
 drivers/gpu/drm/i915/intel_uc_fw.h       |  1 +
 3 files changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 04a3fddabb0d..6035f9cbc761 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -945,6 +945,30 @@ void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
 	vebox_mask = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >>
 		      GEN11_GT_VEBOX_DISABLE_SHIFT;
 
+	if (USES_GUC_SUBMISSION(dev_priv)) {
+		struct intel_guc *guc = &dev_priv->guc;
+		struct intel_uc_fw *guc_fw = &guc->fw;
+		u32 guc_ver, guc_req;
+
+		/* GuC < 32.0.3 barfs on too many media engines */
+		/* NB: *_ver_found is not available yet so need to use _ver_wanted. */
+
+		if (!guc_fw->major_ver_wanted && !guc_fw->minor_ver_wanted) {
+			DRM_INFO("GuC FW version unknown (overridden by module param?).\n");
+			DRM_INFO("NB: FW earlier than 32.0.3 may break VCS4-7 and VECS2-3!\n");
+		} else {
+			guc_ver = (guc_fw->major_ver_wanted << 16) |
+				  (guc_fw->minor_ver_wanted << 8) |
+				  guc_fw->patch_ver_wanted;
+
+			guc_req = (32 << 16) | (0 << 8) | 3;
+			if (guc_ver < guc_req) {
+				vdbox_mask &= 0xF;
+				vebox_mask &= 0x3;
+			}
+		}
+	}
+
 	for (i = 0; i < I915_MAX_VCS; i++) {
 		if (!HAS_ENGINE(dev_priv, _VCS(i)))
 			continue;
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c
index 3195d23a6b5f..ffa083b72568 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -98,6 +98,7 @@ static void guc_fw_select(struct intel_uc_fw *guc_fw)
 		guc_fw->path = ATS_GUC_FIRMWARE_PATH;
 		guc_fw->major_ver_wanted = ATS_GUC_FW_MAJOR;
 		guc_fw->minor_ver_wanted = ATS_GUC_FW_MINOR;
+		guc_fw->patch_ver_wanted = ATS_GUC_FW_PATCH;
 	} else if (IS_TIGERLAKE(i915)) {
 		guc_fw->path = TGL_GUC_FIRMWARE_PATH;
 		guc_fw->major_ver_wanted = TGL_GUC_FW_MAJOR;
diff --git a/drivers/gpu/drm/i915/intel_uc_fw.h b/drivers/gpu/drm/i915/intel_uc_fw.h
index 0e3bd580e267..68f39b129a96 100644
--- a/drivers/gpu/drm/i915/intel_uc_fw.h
+++ b/drivers/gpu/drm/i915/intel_uc_fw.h
@@ -62,6 +62,7 @@ struct intel_uc_fw {
 	 */
 	u16 major_ver_wanted;
 	u16 minor_ver_wanted;
+	u16 patch_ver_wanted;
 	u16 major_ver_found;
 	u16 minor_ver_found;