[Intel-gfx] [PATCH] drm/i915: Move the decision to use the breadcrumb tasklet to the backend

[Tvrtko Ursulin]

On 03/04/2019 14:00, Chris Wilson wrote:
> Quoting Chris Wilson (2019-03-29 15:49:12)
>> Use the engine->flags to store whether we want to kick the submission
>> tasklet on receipt of a breadcrumb interrupt, so that this decision can
>> be made by the submission backend and not dependent on a limited feature
>> test within the interrupt handler. This should make it easier to adapt
>> different submission backends.
> 
> This comes with a cherry on top!
> 
> add/remove: 0/1 grow/shrink: 2/2 up/down: 20/-86 (-66)
> Function                                     old     new   delta
> guc_submission_park                            5      18     +13
> guc_submission_unpark                          5      12      +7
> gen8_cs_irq_handler                           97      77     -20
> gen8_cs_irq_handler.cold                      33       -     -33
> __func__                                   28208   28175     -33
> 
> The function name was as large as the function itself?

Cherry on the top is just GEM_BUG_ON in intel_uc_is_using_guc_submission 
I suspect. Nevertheless, patch makes sense.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Regards,

Tvrtko

>> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
>> Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
>> Cc: Xiaolin Zhang <xiaolin.zhang at intel.com>
>> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_irq.c             | 2 +-
>>   drivers/gpu/drm/i915/intel_engine_types.h   | 7 +++++++
>>   drivers/gpu/drm/i915/intel_guc_submission.c | 2 ++
>>   3 files changed, 10 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>> index 455b2bf691b5..aa107a78cb36 100644
>> --- a/drivers/gpu/drm/i915/i915_irq.c
>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>> @@ -1470,7 +1470,7 @@ gen8_cs_irq_handler(struct intel_engine_cs *engine, u32 iir)
>>   
>>          if (iir & GT_RENDER_USER_INTERRUPT) {
>>                  intel_engine_breadcrumbs_irq(engine);
>> -               tasklet |= USES_GUC_SUBMISSION(engine->i915);
>> +               tasklet |= intel_engine_needs_breadcrumb_tasklet(engine);
>>          }
>>   
>>          if (tasklet)
>> diff --git a/drivers/gpu/drm/i915/intel_engine_types.h b/drivers/gpu/drm/i915/intel_engine_types.h
>> index b3249bf6a65f..5c3f567a7a20 100644
>> --- a/drivers/gpu/drm/i915/intel_engine_types.h
>> +++ b/drivers/gpu/drm/i915/intel_engine_types.h
>> @@ -425,6 +425,7 @@ struct intel_engine_cs {
>>   #define I915_ENGINE_SUPPORTS_STATS   BIT(1)
>>   #define I915_ENGINE_HAS_PREEMPTION   BIT(2)
>>   #define I915_ENGINE_HAS_SEMAPHORES   BIT(3)
>> +#define I915_ENGINE_NEEDS_BREADCRUMB_TASKLET BIT(4)
>>          unsigned int flags;
>>   
>>          /*
>> @@ -508,6 +509,12 @@ intel_engine_has_semaphores(const struct intel_engine_cs *engine)
>>          return engine->flags & I915_ENGINE_HAS_SEMAPHORES;
>>   }
>>   
>> +static inline bool
>> +intel_engine_needs_breadcrumb_tasklet(const struct intel_engine_cs *engine)
>> +{
>> +       return engine->flags & I915_ENGINE_NEEDS_BREADCRUMB_TASKLET;
>> +}
>> +
>>   #define instdone_slice_mask(dev_priv__) \
>>          (IS_GEN(dev_priv__, 7) ? \
>>           1 : RUNTIME_INFO(dev_priv__)->sseu.slice_mask)
>> diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
>> index c4ad73980988..c58922226d47 100644
>> --- a/drivers/gpu/drm/i915/intel_guc_submission.c
>> +++ b/drivers/gpu/drm/i915/intel_guc_submission.c
>> @@ -1262,10 +1262,12 @@ static void guc_interrupts_release(struct drm_i915_private *dev_priv)
>>   static void guc_submission_park(struct intel_engine_cs *engine)
>>   {
>>          intel_engine_unpin_breadcrumbs_irq(engine);
>> +       engine->flags &= ~I915_ENGINE_NEEDS_BREADCRUMB_TASKLET;
>>   }
>>   
>>   static void guc_submission_unpark(struct intel_engine_cs *engine)
>>   {
>> +       engine->flags |= I915_ENGINE_NEEDS_BREADCRUMB_TASKLET;
>>          intel_engine_pin_breadcrumbs_irq(engine);
>>   }
>>   
>> -- 
>> 2.20.1
>>
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