[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915/psr: Update PSR2 SU corruption workaround comment

[Patchwork]

== Series Details ==

Series: series starting with [1/7] drm/i915/psr: Update PSR2 SU corruption workaround comment
URL   : https://patchwork.freedesktop.org/series/58974/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
a823afc06f70 drm/i915/psr: Update PSR2 SU corruption workaround comment
e483edd370ea drm/i915: Remove unused VLV/CHV PSR registers
997ec2ab8f6d drm/i915/psr: Initialize PSR mutex even when sink is not reliable
841cd7fa823e drm/i915/psr: Do not enable PSR in interlaced mode for all GENs
1a978559512b drm/i915/bdw+: Move misc display IRQ handling to it own function
39c5d9840b98 drm/i915/psr: Remove partial PSR support on multiple transcoders
2ec4ae3c2d94 drm/i915: Make PSR registers relative to transcoders
-:93: WARNING:LONG_LINE: line over 100 characters
#93: FILE: drivers/gpu/drm/i915/i915_reg.h:254:
+					 INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + (reg) + \

-:109: WARNING:LONG_LINE: line over 100 characters
#109: FILE: drivers/gpu/drm/i915/i915_reg.h:4217:
+#define _TRANS2_PSR(reg)	(_TRANS2(dev_priv->psr.transcoder, (reg)) - dev_priv->psr.mmio_base_adjust)

-:135: WARNING:LONG_LINE_COMMENT: line over 100 characters
#135: FILE: drivers/gpu/drm/i915/i915_reg.h:4266:
+#define EDP_PSR_AUX_DATA(i)			_MMIO(_TRANS2_PSR(_SRD_AUX_DATA_A) + (i) + 4) /* 5 registers */

total: 0 errors, 3 warnings, 0 checks, 166 lines checked