[Intel-gfx] [PATCH] drm/i915: Fix pipe_bpp readout for BXT/GLK DSI

[Jani Nikula]

On Fri, 05 Apr 2019, Imre Deak <imre.deak at intel.com> wrote:
> On Fri, Apr 05, 2019 at 05:13:49PM +0300, Ville Syrjala wrote:
>> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>> 
>> The only bpc information in pipe registers for BXT/GLK DSI
>> is the PIPEMISC dither bpc. Let's try to use that to read
>> out pipe_bpp on these platforms. However, I'm not sure if
>> this will be correctly populated by the GOP since bspec
>> suggests it's only needed if dithering is actually enabled.
>> If not I guess we'll have to go one step further and
>> extract pipe_bpp from the DSI pixel format when dithering
>> is disabled.
>> 
>> Cc: Hans de Goede <hdegoede at redhat.com>
>> Fixes: ca0b04db14a5 ("drm/i915/dsi: Fix pipe_bpp for handling for 6 bpc pixel-formats")
>> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Reviewed-by: Imre Deak <imre.deak at intel.com>

I referenced the bug though I guess we're not 100% confident this fixes
it throughout...?

Pushed, thanks for the patch and review.

BR,
Jani.


>
>> ---
>>  drivers/gpu/drm/i915/vlv_dsi.c | 24 ++++++++++++++++++++++++
>>  1 file changed, 24 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
>> index 0a950c976bbb..6898541403a2 100644
>> --- a/drivers/gpu/drm/i915/vlv_dsi.c
>> +++ b/drivers/gpu/drm/i915/vlv_dsi.c
>> @@ -256,6 +256,28 @@ static void band_gap_reset(struct drm_i915_private *dev_priv)
>>  	mutex_unlock(&dev_priv->sb_lock);
>>  }
>>  
>> +static int bdw_get_pipemisc_bpp(struct intel_crtc *crtc)
>> +{
>> +	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>> +	u32 tmp;
>> +
>> +	tmp = I915_READ(PIPEMISC(crtc->pipe));
>> +
>> +	switch (tmp & PIPEMISC_DITHER_BPC_MASK) {
>> +	case PIPEMISC_DITHER_6_BPC:
>> +		return 18;
>> +	case PIPEMISC_DITHER_8_BPC:
>> +		return 24;
>> +	case PIPEMISC_DITHER_10_BPC:
>> +		return 30;
>> +	case PIPEMISC_DITHER_12_BPC:
>> +		return 36;
>> +	default:
>> +		MISSING_CASE(tmp);
>> +		return 0;
>> +	}
>> +}
>> +
>>  static int intel_dsi_compute_config(struct intel_encoder *encoder,
>>  				    struct intel_crtc_state *pipe_config,
>>  				    struct drm_connector_state *conn_state)
>> @@ -1082,6 +1104,8 @@ static void bxt_dsi_get_pipe_config(struct intel_encoder *encoder,
>>  	bpp = mipi_dsi_pixel_format_to_bpp(
>>  			pixel_format_from_register_bits(fmt));
>>  
>> +	pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc);
>> +
>>  	/* Enable Frame time stamo based scanline reporting */
>>  	adjusted_mode->private_flags |=
>>  			I915_MODE_FLAG_GET_SCANLINE_FROM_TIMESTAMP;
>> -- 
>> 2.19.2
>> 
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx at lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Graphics Center