[Intel-gfx] [PATCH 2/2] drm/i915: Simplify some icl pll calculations

[Chris Wilson]

Quoting Ville Syrjala (2019-04-08 16:27:02)
> -       /*
> -        * Adjust the original formula to delay the division by 2^22 in order to
> -        * minimize possible rounding errors.
> -        */
> -       tmp = (u64)m1 * m2_int * ref_clock +
> -             (((u64)m1 * m2_frac * ref_clock) >> 22);
> -       tmp = div_u64(tmp, 5 * div1 * div2);
> -
> -       return tmp;
> +       return div_u64(mul_u32_u32(ref_clock * m1, m2),
> +                      (5 * div1 * div2) << 22);

You say the denominator here is a u64, so do you not need to cast
(u64)(5 * d1 * d2) to ensure it doesn't overflow the shift?
Aiui d1, d2 are u32 here.
-Chris