[Intel-gfx] [PATCH 1/2] drm/i915: Use mul_u32_u32() more

Ville Syrjälä ville.syrjala at linux.intel.com
Wed Apr 10 18:24:53 UTC 2019


On Mon, Apr 08, 2019 at 04:44:04PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjala (2019-04-08 16:27:01)
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > We have a lot of '(u64)foo * bar' everywhere. Replace with
> > mul_u32_u32() to avoid gcc failing to use a regular 32x32->64
> > multiply for this.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> As a purely mechanical translation,
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
> 
> > diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> > index e01c057ce50b..29edc369920b 100644
> > --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> > +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> > @@ -2741,11 +2741,11 @@ static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state)
> >         }
> >  
> >         if (use_ssc) {
> > -               tmp = (u64)dco_khz * 47 * 32;
> > +               tmp = mul_u32_u32(dco_khz, 47 * 32);
> >                 do_div(tmp, refclk_khz * m1div * 10000);
> >                 ssc_stepsize = tmp;
> >  
> > -               tmp = (u64)dco_khz * 1000;
> > +               tmp = mul_u32_u32(dco_khz, 1000);
> 
> These caught my eye, wondering if the code was better reduced if the
> constant was first or itself cast to (u64).

Looks like gcc (8.2) handles these two as is actually. Or at least
the generated asm is identical both ways.

-- 
Ville Syrjälä
Intel


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