[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915/bdw+: Move misc display IRQ handling to it own function

Patchwork patchwork at emeril.freedesktop.org
Fri Apr 12 23:24:36 UTC 2019


== Series Details ==

Series: series starting with [v2,1/3] drm/i915/bdw+: Move misc display IRQ handling to it own function
URL   : https://patchwork.freedesktop.org/series/59424/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
5f0a6bbb4f8c drm/i915/bdw+: Move misc display IRQ handling to it own function
970cbdfd1e8d drm/i915/psr: Remove partial PSR support on multiple transcoders
0b8f4172319e drm/i915: Make PSR registers relative to transcoders
-:93: WARNING:LONG_LINE: line over 100 characters
#93: FILE: drivers/gpu/drm/i915/i915_reg.h:254:
+					 INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + (reg) + \

-:109: WARNING:LONG_LINE: line over 100 characters
#109: FILE: drivers/gpu/drm/i915/i915_reg.h:4219:
+#define _TRANS2_PSR(reg)	(_TRANS2(dev_priv->psr.transcoder, (reg)) - dev_priv->psr.mmio_base_adjust)

-:135: WARNING:LONG_LINE_COMMENT: line over 100 characters
#135: FILE: drivers/gpu/drm/i915/i915_reg.h:4268:
+#define EDP_PSR_AUX_DATA(i)			_MMIO(_TRANS2_PSR(_SRD_AUX_DATA_A) + (i) + 4) /* 5 registers */

total: 0 errors, 3 warnings, 0 checks, 166 lines checked



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