[Intel-gfx] [PATCH v2 13/22] drm/i915/guc: New GuC interrupt register for Gen11

[Daniele Ceraolo Spurio]

On 4/11/19 1:44 AM, Michal Wajdeczko wrote:
> Gen11 defines new more flexible Host-to-GuC interrupt register.
> Now the host can write any 32-bit payload to trigger an interrupt
> and GuC can additionally read this payload from the register.
> Current GuC firmware ignores the payload so we just write 0.
> 
> Bspec: 21043
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>

matches the specs.

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>

As a possible simplification, instead of using a function pointer we 
could also just save the interrupt register in guc->send_regs and always 
use GUC_SEND_TRIGGER (the gen11 payload is ignored anyway), or save the 
trigger/payload value as well.

Daniele

> ---
>   drivers/gpu/drm/i915/intel_guc.c     | 14 +++++++++++++-
>   drivers/gpu/drm/i915/intel_guc_reg.h |  1 +
>   2 files changed, 14 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
> index 483c7019f817..5bc9bc7c956a 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -34,6 +34,13 @@ static void gen8_guc_raise_irq(struct intel_guc *guc)
>   	I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
>   }
>   
> +static void gen11_guc_raise_irq(struct intel_guc *guc)
> +{
> +	struct drm_i915_private *dev_priv = guc_to_i915(guc);
> +
> +	I915_WRITE(GEN11_GUC_HOST_INTERRUPT, 0);
> +}
> +
>   static inline i915_reg_t guc_send_reg(struct intel_guc *guc, u32 i)
>   {
>   	GEM_BUG_ON(!guc->send_regs.base);
> @@ -63,6 +70,8 @@ void intel_guc_init_send_regs(struct intel_guc *guc)
>   
>   void intel_guc_init_early(struct intel_guc *guc)
>   {
> +	struct drm_i915_private *i915 = guc_to_i915(guc);
> +
>   	intel_guc_fw_init_early(guc);
>   	intel_guc_ct_init_early(&guc->ct);
>   	intel_guc_log_init_early(&guc->log);
> @@ -71,7 +80,10 @@ void intel_guc_init_early(struct intel_guc *guc)
>   	spin_lock_init(&guc->irq_lock);
>   	guc->send = intel_guc_send_nop;
>   	guc->handler = intel_guc_to_host_event_handler_nop;
> -	guc->notify = gen8_guc_raise_irq;
> +	if (INTEL_GEN(i915) >= 11)
> +		guc->notify = gen11_guc_raise_irq;
> +	else
> +		guc->notify = gen8_guc_raise_irq;
>   }
>   
>   static int guc_init_wq(struct intel_guc *guc)
> diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h b/drivers/gpu/drm/i915/intel_guc_reg.h
> index 57e7ad522c2f..aec02eddbaed 100644
> --- a/drivers/gpu/drm/i915/intel_guc_reg.h
> +++ b/drivers/gpu/drm/i915/intel_guc_reg.h
> @@ -103,6 +103,7 @@
>   
>   #define GUC_SEND_INTERRUPT		_MMIO(0xc4c8)
>   #define   GUC_SEND_TRIGGER		  (1<<0)
> +#define GEN11_GUC_HOST_INTERRUPT	_MMIO(0x1901f0)
>   
>   #define GUC_NUM_DOORBELLS		256
>   
>