[Intel-gfx] [PATCH 0/4] drm/i915: Finish the ack+handler split for irq handler

Chris Wilson chris at chris-wilson.co.uk
Mon Apr 15 15:55:25 UTC 2019

Quoting Ville Syrjala (2019-04-15 16:49:00)
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> I never finished the irq ack+handler split for ilk+. Let's try to do
> that now since people seem keen on cleaning up stuff in there. One
> thing I didn't dare touch is gen11_gt_irq_handler() as that thing
> looks a bit nuts.
> A bit of a downside:
> Total: Before=39303, After=40393, chg +2.77%
> If we changed all _ack()s to raw_reg_{read,write} we'd get:
> Total: Before=39303, After=39258, chg -0.11%
> but that ignores the "hang when accessing registers in the
> same cacheline" fail. So would need a bit more thought.

Otoh, all irq registers should be guarded by either the
dev_priv->irq_lock spinlock or be single threaded by the nature of
interrupt dispatch (handwavy). So we might be able to argue that for the
limited set of registers accessed here, we should be safe.

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