[Intel-gfx] [PATCH v2 16/22] drm/i915/guc: Create vfuncs for the GuC interrupts control functions
Daniele Ceraolo Spurio
daniele.ceraolospurio at intel.com
Mon Apr 15 17:51:33 UTC 2019
On 4/11/19 1:44 AM, Michal Wajdeczko wrote:
> From: Oscar Mateo <oscar.mateo at intel.com>
>
> Controlling and handling of the GuC interrupts is Gen specific.
> Create virtual functions to avoid redundant runtime Gen checks.
> Gen-specific versions of these functions will follow.
>
> Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 22 ++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_irq.c | 18 ++++++++++++------
> drivers/gpu/drm/i915/intel_drv.h | 3 ---
> drivers/gpu/drm/i915/intel_guc.h | 1 -
> drivers/gpu/drm/i915/intel_uc.c | 6 +++---
> 5 files changed, 37 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 35d0782c077e..6c5260d91bc1 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1574,6 +1574,13 @@ struct drm_i915_private {
> u32 pm_guc_events;
> u32 pipestat_irq_mask[I915_MAX_PIPES];
>
> + struct {
> + bool enabled;
> + void (*reset)(struct drm_i915_private *i915);
> + void (*enable)(struct drm_i915_private *i915);
> + void (*disable)(struct drm_i915_private *i915);
> + } guc_interrupts;
> +
I would put those under the guc structure since they're guc-specific
functions. With that:
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Daniele
> struct i915_hotplug hotplug;
> struct intel_fbc fbc;
> struct i915_drrs drrs;
> @@ -2753,6 +2760,21 @@ extern void intel_irq_fini(struct drm_i915_private *dev_priv);
> int intel_irq_install(struct drm_i915_private *dev_priv);
> void intel_irq_uninstall(struct drm_i915_private *dev_priv);
>
> +static inline void intel_reset_guc_interrupts(struct drm_i915_private *i915)
> +{
> + i915->guc_interrupts.reset(i915);
> +}
> +
> +static inline void intel_enable_guc_interrupts(struct drm_i915_private *i915)
> +{
> + i915->guc_interrupts.enable(i915);
> +}
> +
> +static inline void intel_disable_guc_interrupts(struct drm_i915_private *i915)
> +{
> + i915->guc_interrupts.disable(i915);
> +}
> +
> static inline bool intel_gvt_active(struct drm_i915_private *dev_priv)
> {
> return dev_priv->gvt;
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index d934545445e1..e2f0cbee9345 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -554,7 +554,7 @@ void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv)
> gen6_reset_rps_interrupts(dev_priv);
> }
>
> -void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv)
> +static void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv)
> {
> assert_rpm_wakelock_held(dev_priv);
>
> @@ -563,26 +563,26 @@ void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv)
> spin_unlock_irq(&dev_priv->irq_lock);
> }
>
> -void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv)
> +static void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv)
> {
> assert_rpm_wakelock_held(dev_priv);
>
> spin_lock_irq(&dev_priv->irq_lock);
> - if (!dev_priv->guc.interrupts_enabled) {
> + if (!dev_priv->guc_interrupts.enabled) {
> WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) &
> dev_priv->pm_guc_events);
> - dev_priv->guc.interrupts_enabled = true;
> + dev_priv->guc_interrupts.enabled = true;
> gen6_enable_pm_irq(dev_priv, dev_priv->pm_guc_events);
> }
> spin_unlock_irq(&dev_priv->irq_lock);
> }
>
> -void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv)
> +static void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv)
> {
> assert_rpm_wakelock_held(dev_priv);
>
> spin_lock_irq(&dev_priv->irq_lock);
> - dev_priv->guc.interrupts_enabled = false;
> + dev_priv->guc_interrupts.enabled = false;
>
> gen6_disable_pm_irq(dev_priv, dev_priv->pm_guc_events);
>
> @@ -4673,6 +4673,12 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
> if (INTEL_GEN(dev_priv) >= 8)
> rps->pm_intrmsk_mbz |= GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC;
>
> + if (INTEL_GEN(dev_priv) >= 9) {
> + dev_priv->guc_interrupts.reset = gen9_reset_guc_interrupts;
> + dev_priv->guc_interrupts.enable = gen9_enable_guc_interrupts;
> + dev_priv->guc_interrupts.disable = gen9_disable_guc_interrupts;
> + }
> +
> if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
> dev->driver->get_vblank_counter = g4x_get_vblank_counter;
> else if (INTEL_GEN(dev_priv) >= 3)
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index a38b9cff5cd0..9b6cac90e891 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1627,9 +1627,6 @@ void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,
> u8 pipe_mask);
> void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv,
> u8 pipe_mask);
> -void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv);
> -void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv);
> -void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv);
>
> /* intel_display.c */
> void intel_plane_destroy(struct drm_plane *plane);
> diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
> index 4f3cf8eddfe6..0371b8f30930 100644
> --- a/drivers/gpu/drm/i915/intel_guc.h
> +++ b/drivers/gpu/drm/i915/intel_guc.h
> @@ -56,7 +56,6 @@ struct intel_guc {
>
> /* intel_guc_recv interrupt related state */
> spinlock_t irq_lock;
> - bool interrupts_enabled;
> unsigned int msg_enabled_mask;
>
> struct i915_vma *ads_vma;
> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> index 03bc2a0ee34b..a1a068511fd9 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -219,7 +219,7 @@ static int guc_enable_communication(struct intel_guc *guc)
> {
> struct drm_i915_private *i915 = guc_to_i915(guc);
>
> - gen9_enable_guc_interrupts(i915);
> + intel_enable_guc_interrupts(i915);
>
> if (HAS_GUC_CT(i915))
> return intel_guc_ct_enable(&guc->ct);
> @@ -236,7 +236,7 @@ static void guc_disable_communication(struct intel_guc *guc)
> if (HAS_GUC_CT(i915))
> intel_guc_ct_disable(&guc->ct);
>
> - gen9_disable_guc_interrupts(i915);
> + intel_disable_guc_interrupts(i915);
>
> guc->send = intel_guc_send_nop;
> guc->handler = intel_guc_to_host_event_handler_nop;
> @@ -358,7 +358,7 @@ int intel_uc_init_hw(struct drm_i915_private *i915)
>
> GEM_BUG_ON(!HAS_GUC(i915));
>
> - gen9_reset_guc_interrupts(i915);
> + intel_reset_guc_interrupts(i915);
>
> /* WaEnableuKernelHeaderValidFix:skl */
> /* WaEnableGuCBootHashCheckNotSet:skl,bxt,kbl */
>
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