[Intel-gfx] [PATCH 2/2] drm/i915: Setup the RCS ring prior to execution

[Tvrtko Ursulin]

On 18/04/2019 14:27, Chris Wilson wrote:
> We need to set the various ring registers prior to restarting the
> engine, or else we may restart it after reset/resume in an ill-defined
> state.
> 
> Reported-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> ---
>   drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +----
>   1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 00bd9eeb053d..3844581f622c 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -831,9 +831,6 @@ static int intel_rcs_ctx_init(struct i915_request *rq)
>   static int init_render_ring(struct intel_engine_cs *engine)
>   {
>   	struct drm_i915_private *dev_priv = engine->i915;
> -	int ret = init_ring_common(engine);
> -	if (ret)
> -		return ret;
>   
>   	/* WaTimedSingleVertexDispatch:cl,bw,ctg,elk,ilk,snb */
>   	if (IS_GEN_RANGE(dev_priv, 4, 6))
> @@ -873,7 +870,7 @@ static int init_render_ring(struct intel_engine_cs *engine)
>   	if (IS_GEN_RANGE(dev_priv, 6, 7))
>   		I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
>   
> -	return 0;
> +	return init_ring_common(engine);
>   }
>   
>   static void cancel_requests(struct intel_engine_cs *engine)
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Regards,

Tvrtko