[Intel-gfx] [PATCH v2 3/5] drm/i915/uc: Place uC firmware in upper range of GGTT

[Chris Wilson]

Quoting Fernando Pacheco (2019-04-19 00:31:49)
> Currently we pin the GuC or HuC firmware image just
> before uploading. Perma-pin during uC initialization
> instead and use the range reserved at the top of the
> address space.
> 
> Moving the firmware resulted in needing to:
> - restore the ggtt mapping during the suspend/resume path.
> - use an additional pinning for the rsa signature which will
>   be used during HuC auth as addresses above GUC_GGTT_TOP
>   do not map through GTT.
> 
> v2: Remove call to set to gtt domain
>     Do not restore fw gtt mapping unconditionally
>     Separate out pin/unpin functions and drop usage of pin/unpin
>     Use uc_fw init/fini functions to bind/unbind fw object
> 
> Signed-off-by: Fernando Pacheco <fernando.pacheco at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem.c     |   2 +
>  drivers/gpu/drm/i915/intel_guc.c    |   9 ++-
>  drivers/gpu/drm/i915/intel_guc_fw.c |  18 +++--
>  drivers/gpu/drm/i915/intel_huc.c    |  74 +++++++++++++----
>  drivers/gpu/drm/i915/intel_huc.h    |   4 +
>  drivers/gpu/drm/i915/intel_huc_fw.c |  47 ++++++++---
>  drivers/gpu/drm/i915/intel_uc.c     |  39 ++++++++-
>  drivers/gpu/drm/i915/intel_uc.h     |   1 +
>  drivers/gpu/drm/i915/intel_uc_fw.c  | 118 +++++++++++++++++++++-------
>  drivers/gpu/drm/i915/intel_uc_fw.h  |   9 ++-
>  10 files changed, 247 insertions(+), 74 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index e5462639de0b..0e06a2c7d65f 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4508,6 +4508,8 @@ void i915_gem_resume(struct drm_i915_private *i915)
>         i915_gem_restore_gtt_mappings(i915);
>         i915_gem_restore_fences(i915);
>  
> +       intel_uc_restore_ggtt_mapping(i915);

Nope. They do not need to be restored as the bindings are only required
for the xfer.
-Chris