[Intel-gfx] [PATCH 04/10] drm/i915: Reduce RPS update frequency on Valleyview/Cherryview

[Ville Syrjälä]

On Fri, Apr 19, 2019 at 06:13:56PM +0100, Chris Wilson wrote:
> Valleyview and Cherryview update the GPU frequency via the punit, which
> is very expensive as we have to ensure the cores do not sleep during the
> comms. If we perform frequent RPS evaluations, the frequent punit
> requests cause measurable system overhead for little benefit, so
> increase the evaluation intervals to reduce the number of times we try
> and change frequency.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 9db39ea9bd83..ba6d3d1adf6c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6593,6 +6593,19 @@ static void rps_set_power(struct drm_i915_private *dev_priv, int new_power)
>  		break;
>  	}
>  
> +	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {

Since you added the qos only for vlv do we still want to keep chv here?

> +		/*
> +		 * Baytrail and Braswell control the gpu frequency via the
> +		 * punit, which is very slow and expensive to communicate with,
> +		 * as we synchronously force the package to C0. If we try and
> +		 * update the gpufreq too often we cause measurable system
> +		 * load for little benefit (effectively stealing CPU time for
> +		 * the GPU, negatively impacting overall throughput).
> +		 */
> +		ei_up <<= 2;
> +		ei_down <<= 2;
> +	}
> +
>  	/* When byt can survive without system hang with dynamic
>  	 * sw freq adjustments, this restriction can be lifted.
>  	 */
> -- 
> 2.20.1
> 
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-- 
Ville Syrjälä
Intel