[Intel-gfx] [PATCH v5 0/8] i915 vgpu PV to improve vgpu performance
xiaolin.zhang at intel.com
Mon Apr 29 03:10:50 UTC 2019
To improve vgpu performance, it could implement some PV optimization
such as to reduce the mmio access trap numbers or eliminate certain piece
of HW emulation within guest driver to reduce vm exit/vm enter cost.
the solutions in this patch set are implemented two PV optimizations based
on the shared memory region between guest and GVTg for data communication.
The shared memory region is allocated by guest driver and this
region's memory guest physical address will be passed to GVTg through
PVINFO register and later GVTg can access this region directly without
trap cost to achieve data exchange purpose between guest and GVTg.
in this patch set, 2 kind of PV optimization implemented controlled by
pv_caps PVINO register with different pv bit.
1. workload PV submission (context submission): reduce 4 traps to 1 trap
and eliminated execlists HW behaviour emulation.
2. ppgtt PV update: eliminate the cost of ppgtt write protection.
based on the experiment, for small workloads, specifally, glxgears with
vblank_mode off, the average performance gain on single vgpu is 30~50%.
for large workload such as media and 3D, the average performance gain
is about 4%.
based on the PV mechanism, it could achive more vgpu feature optimization
such as globle GTT update, display plane and water mark update.
v0: RFC patch set
v1: addressed RFC review comments
v2: addressed v1 review comments, added pv callbacks for pv operations
1. addressed v2 review comments, removed pv callbacks code duplication in
v2 and unified pv calls under g2v notification register. different g2v pv
2. dropped pv master irq feature due to hard conflict with recnet i915
change and take time to rework.
1. addressed v3 review comments.
2. extended workload PV submission by skip execlists HW behaviour emulation
and context switch interrupt injection.
1. addressed v4 review comments from Chris for pv submission.
2. per-engine communication between PV guest and host.
Xiaolin Zhang (8):
drm/i915: introduced vgpu pv capability
drm/i915: vgpu shared memory setup for pv optimization
drm/i915: vgpu ppgtt update pv optimization
drm/i915: vgpu context submission pv optimization
drm/i915/gvt: GVTg handle pv_caps PVINFO register
drm/i915/gvt: GVTg handle shared_page setup
drm/i915/gvt: GVTg support ppgtt pv optimization
drm/i915/gvt: GVTg support context submission pv optimization
drivers/gpu/drm/i915/Makefile | 2 +-
drivers/gpu/drm/i915/gt/intel_lrc.c | 8 +-
drivers/gpu/drm/i915/gvt/execlist.c | 6 +
drivers/gpu/drm/i915/gvt/gtt.c | 317 +++++++++++++++++++++++++++++
drivers/gpu/drm/i915/gvt/gtt.h | 9 +
drivers/gpu/drm/i915/gvt/gvt.h | 10 +-
drivers/gpu/drm/i915/gvt/handlers.c | 43 +++-
drivers/gpu/drm/i915/gvt/vgpu.c | 31 +++
drivers/gpu/drm/i915/i915_drv.h | 6 +-
drivers/gpu/drm/i915/i915_gem.c | 3 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 9 +-
drivers/gpu/drm/i915/i915_gem_gtt.h | 8 +
drivers/gpu/drm/i915/i915_pvinfo.h | 12 +-
drivers/gpu/drm/i915/i915_vgpu.c | 175 +++++++++++++++-
drivers/gpu/drm/i915/i915_vgpu.h | 48 +++++
drivers/gpu/drm/i915/intel_pv_submission.c | 177 ++++++++++++++++
16 files changed, 852 insertions(+), 12 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_pv_submission.c
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