[Intel-gfx] [PATCH 2/2] drm/i915: Fix up the inverse mapping for default ctx->engines[]
Mika Kuoppala
mika.kuoppala at linux.intel.com
Thu Aug 8 12:59:41 UTC 2019
Chris Wilson <chris at chris-wilson.co.uk> writes:
> The order in which we store the engines inside default_engines() for the
> legacy ctx->engines[] has to match the legacy I915_EXEC_RING selector
> mapping in execbuf::user_map. If we present VCS2 as being the second
> instance of the video engine, legacy userspace calls that I915_EXEC_BSD2
> and so we need to insert it into the second video slot.
>
> v2: Record the legacy mapping (hopefully we can remove this need in the
> future)
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111328
> Fixes: 2edda80db3d0 ("drm/i915: Rename engines to match their user interface")
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> Reviewed-by: Mika Kuoppala <mika.kuoppala at linux.intel.com> #v1
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 7 +--
> .../drm/i915/gem/selftests/igt_gem_utils.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_engine_types.h | 3 ++
> drivers/gpu/drm/i915/gt/intel_engine_user.c | 52 +++++++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt_types.h | 1 +
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +-
> .../gpu/drm/i915/gt/selftest_workarounds.c | 2 +-
> 7 files changed, 63 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 1c5bc21a80ff..b407baaf0014 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -159,7 +159,7 @@ lookup_user_engine(struct i915_gem_context *ctx,
> if (!engine)
> return ERR_PTR(-EINVAL);
>
> - idx = engine->id;
> + idx = engine->legacy_idx;
> } else {
> idx = ci->engine_instance;
> }
> @@ -279,6 +279,7 @@ static void free_engines_rcu(struct rcu_head *rcu)
>
> static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx)
clone_legacy_engines
create_gt_engines
shrug
Reviewed-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> {
> + const struct intel_gt *gt = &ctx->i915->gt;
> struct intel_engine_cs *engine;
> struct i915_gem_engines *e;
> enum intel_engine_id id;
> @@ -288,7 +289,7 @@ static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx)
> return ERR_PTR(-ENOMEM);
>
> init_rcu_head(&e->rcu);
> - for_each_engine(engine, ctx->i915, id) {
> + for_each_engine(engine, gt, id) {
> struct intel_context *ce;
>
> ce = intel_context_create(ctx, engine);
> @@ -298,8 +299,8 @@ static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx)
> }
>
> e->engines[id] = ce;
> + e->num_engines = id + 1;
> }
> - e->num_engines = id;
>
> return e;
> }
> diff --git a/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c b/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
> index b232e6d2cd92..93c636aeae73 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
> @@ -23,7 +23,7 @@ igt_request_alloc(struct i915_gem_context *ctx, struct intel_engine_cs *engine)
> * GGTT space, so do this first before we reserve a seqno for
> * ourselves.
> */
> - ce = i915_gem_context_get_engine(ctx, engine->id);
> + ce = i915_gem_context_get_engine(ctx, engine->legacy_idx);
> if (IS_ERR(ce))
> return ERR_CAST(ce);
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> index dacaa707c797..c79fd1dafa88 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> @@ -264,8 +264,11 @@ struct intel_engine_cs {
> char name[INTEL_ENGINE_CS_MAX_NAME];
>
> enum intel_engine_id id;
> + enum intel_engine_id legacy_idx;
> +
> unsigned int hw_id;
> unsigned int guc_id;
> +
> intel_engine_mask_t mask;
>
> u8 class;
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c b/drivers/gpu/drm/i915/gt/intel_engine_user.c
> index c41ae05988a5..77cd5de83930 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
> @@ -142,8 +142,57 @@ const char *intel_engine_class_repr(u8 class)
> return uabi_names[class];
> }
>
> +struct legacy_ring {
> + struct intel_gt *gt;
> + u8 class;
> + u8 instance;
> +};
> +
> +static int legacy_ring_idx(const struct legacy_ring *ring)
> +{
> + static const struct {
> + u8 base, max;
> + } map[] = {
> + [RENDER_CLASS] = { RCS0, 1 },
> + [COPY_ENGINE_CLASS] = { BCS0, 1 },
> + [VIDEO_DECODE_CLASS] = { VCS0, I915_MAX_VCS },
> + [VIDEO_ENHANCEMENT_CLASS] = { VECS0, I915_MAX_VECS },
> + };
> +
> + if (GEM_DEBUG_WARN_ON(ring->class >= ARRAY_SIZE(map)))
> + return -1;
> +
> + if (GEM_DEBUG_WARN_ON(ring->instance >= map[ring->class].max))
> + return -1;
> +
> + return map[ring->class].base + ring->instance;
> +}
> +
> +static void add_legacy_ring(struct legacy_ring *ring,
> + struct intel_engine_cs *engine)
> +{
> + int idx;
> +
> + if (engine->gt != ring->gt || engine->class != ring->class) {
> + ring->gt = engine->gt;
> + ring->class = engine->class;
> + ring->instance = 0;
> + }
> +
> + idx = legacy_ring_idx(ring);
> + if (unlikely(idx == -1))
> + return;
> +
> + GEM_BUG_ON(idx >= ARRAY_SIZE(ring->gt->engine));
> + ring->gt->engine[idx] = engine;
> + ring->instance++;
> +
> + engine->legacy_idx = idx;
> +}
> +
> void intel_engines_driver_register(struct drm_i915_private *i915)
> {
> + struct legacy_ring ring = {};
> u8 uabi_instances[4] = {};
> struct list_head *it, *next;
> struct rb_node **p, *prev;
> @@ -179,6 +228,9 @@ void intel_engines_driver_register(struct drm_i915_private *i915)
> engine->uabi_class,
> engine->uabi_instance) != engine);
>
> + /* Fix up the mapping to match default execbuf::user_map[] */
> + add_legacy_ring(&ring, engine);
> +
> prev = &engine->uabi_node;
> p = &prev->rb_right;
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> index 5fd11e361d03..789102f4f46b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> @@ -78,6 +78,7 @@ struct intel_gt {
>
> u32 pm_guc_events;
>
> + struct intel_engine_cs *engine[I915_NUM_ENGINES];
> struct intel_engine_cs *engine_class[MAX_ENGINE_CLASS + 1]
> [MAX_ENGINE_INSTANCE + 1];
> };
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index b26225751a54..91f1c9012489 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -490,7 +490,7 @@ spinner_create_request(struct igt_spinner *spin,
> struct intel_context *ce;
> struct i915_request *rq;
>
> - ce = i915_gem_context_get_engine(ctx, engine->id);
> + ce = i915_gem_context_get_engine(ctx, engine->legacy_idx);
> if (IS_ERR(ce))
> return ERR_CAST(ce);
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index 5efd2bb89d5f..eb5da01d0a08 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -250,7 +250,7 @@ switch_to_scratch_context(struct intel_engine_cs *engine,
>
> GEM_BUG_ON(i915_gem_context_is_bannable(ctx));
>
> - ce = i915_gem_context_get_engine(ctx, engine->id);
> + ce = i915_gem_context_get_engine(ctx, engine->legacy_idx);
> GEM_BUG_ON(IS_ERR(ce));
>
> rq = ERR_PTR(-ENODEV);
> --
> 2.23.0.rc1
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